1*b5975ce4SSatya Priya Kakitapalli# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*b5975ce4SSatya Priya Kakitapalli%YAML 1.2 3*b5975ce4SSatya Priya Kakitapalli--- 4*b5975ce4SSatya Priya Kakitapalli$id: http://devicetree.org/schemas/clock/qcom,sc8180x-camcc.yaml# 5*b5975ce4SSatya Priya Kakitapalli$schema: http://devicetree.org/meta-schemas/core.yaml# 6*b5975ce4SSatya Priya Kakitapalli 7*b5975ce4SSatya Priya Kakitapallititle: Qualcomm Camera Clock & Reset Controller on SC8180X 8*b5975ce4SSatya Priya Kakitapalli 9*b5975ce4SSatya Priya Kakitapallimaintainers: 10*b5975ce4SSatya Priya Kakitapalli - Satya Priya Kakitapalli <quic_skakitap@quicinc.com> 11*b5975ce4SSatya Priya Kakitapalli 12*b5975ce4SSatya Priya Kakitapallidescription: | 13*b5975ce4SSatya Priya Kakitapalli Qualcomm camera clock control module provides the clocks, resets and 14*b5975ce4SSatya Priya Kakitapalli power domains on SC8180X. 15*b5975ce4SSatya Priya Kakitapalli 16*b5975ce4SSatya Priya Kakitapalli See also: include/dt-bindings/clock/qcom,sc8180x-camcc.h 17*b5975ce4SSatya Priya Kakitapalli 18*b5975ce4SSatya Priya Kakitapalliproperties: 19*b5975ce4SSatya Priya Kakitapalli compatible: 20*b5975ce4SSatya Priya Kakitapalli const: qcom,sc8180x-camcc 21*b5975ce4SSatya Priya Kakitapalli 22*b5975ce4SSatya Priya Kakitapalli clocks: 23*b5975ce4SSatya Priya Kakitapalli items: 24*b5975ce4SSatya Priya Kakitapalli - description: Camera AHB clock from GCC 25*b5975ce4SSatya Priya Kakitapalli - description: Board XO source 26*b5975ce4SSatya Priya Kakitapalli - description: Sleep clock source 27*b5975ce4SSatya Priya Kakitapalli 28*b5975ce4SSatya Priya Kakitapalli power-domains: 29*b5975ce4SSatya Priya Kakitapalli maxItems: 1 30*b5975ce4SSatya Priya Kakitapalli description: 31*b5975ce4SSatya Priya Kakitapalli A phandle and PM domain specifier for the MMCX power domain. 32*b5975ce4SSatya Priya Kakitapalli 33*b5975ce4SSatya Priya Kakitapalli required-opps: 34*b5975ce4SSatya Priya Kakitapalli maxItems: 1 35*b5975ce4SSatya Priya Kakitapalli description: 36*b5975ce4SSatya Priya Kakitapalli A phandle to an OPP node describing required MMCX performance point. 37*b5975ce4SSatya Priya Kakitapalli 38*b5975ce4SSatya Priya Kakitapallirequired: 39*b5975ce4SSatya Priya Kakitapalli - compatible 40*b5975ce4SSatya Priya Kakitapalli - clocks 41*b5975ce4SSatya Priya Kakitapalli - power-domains 42*b5975ce4SSatya Priya Kakitapalli - required-opps 43*b5975ce4SSatya Priya Kakitapalli 44*b5975ce4SSatya Priya KakitapalliallOf: 45*b5975ce4SSatya Priya Kakitapalli - $ref: qcom,gcc.yaml# 46*b5975ce4SSatya Priya Kakitapalli 47*b5975ce4SSatya Priya KakitapalliunevaluatedProperties: false 48*b5975ce4SSatya Priya Kakitapalli 49*b5975ce4SSatya Priya Kakitapalliexamples: 50*b5975ce4SSatya Priya Kakitapalli - | 51*b5975ce4SSatya Priya Kakitapalli #include <dt-bindings/clock/qcom,gcc-sc8180x.h> 52*b5975ce4SSatya Priya Kakitapalli #include <dt-bindings/clock/qcom,rpmh.h> 53*b5975ce4SSatya Priya Kakitapalli #include <dt-bindings/power/qcom-rpmpd.h> 54*b5975ce4SSatya Priya Kakitapalli clock-controller@ad00000 { 55*b5975ce4SSatya Priya Kakitapalli compatible = "qcom,sc8180x-camcc"; 56*b5975ce4SSatya Priya Kakitapalli reg = <0x0ad00000 0x20000>; 57*b5975ce4SSatya Priya Kakitapalli clocks = <&gcc GCC_CAMERA_AHB_CLK>, 58*b5975ce4SSatya Priya Kakitapalli <&rpmhcc RPMH_CXO_CLK>, 59*b5975ce4SSatya Priya Kakitapalli <&sleep_clk>; 60*b5975ce4SSatya Priya Kakitapalli power-domains = <&rpmhpd SC8180X_MMCX>; 61*b5975ce4SSatya Priya Kakitapalli required-opps = <&rpmhpd_opp_low_svs>; 62*b5975ce4SSatya Priya Kakitapalli 63*b5975ce4SSatya Priya Kakitapalli #clock-cells = <1>; 64*b5975ce4SSatya Priya Kakitapalli #reset-cells = <1>; 65*b5975ce4SSatya Priya Kakitapalli #power-domain-cells = <1>; 66*b5975ce4SSatya Priya Kakitapalli }; 67*b5975ce4SSatya Priya Kakitapalli... 68