xref: /linux/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml (revision 9f7140bf23df90cdfd664dea0f0da7aacf8aeeb5)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,sc7280-lpasscorecc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm LPASS Core & Audio Clock Controller on SC7280
8
9maintainers:
10  - Taniya Das <quic_tdas@quicinc.com>
11
12description: |
13  Qualcomm LPASS core and audio clock control module provides the clocks and
14  power domains on SC7280.
15
16  See also::
17    include/dt-bindings/clock/qcom,lpasscorecc-sc7280.h
18    include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h
19
20properties:
21  compatible:
22    enum:
23      - qcom,qcm6490-lpassaudiocc
24      - qcom,sc7280-lpassaoncc
25      - qcom,sc7280-lpassaudiocc
26      - qcom,sc7280-lpasscorecc
27      - qcom,sc7280-lpasshm
28
29  reg:
30    minItems: 1
31    maxItems: 2
32
33  clocks:
34    minItems: 1
35    maxItems: 3
36
37  clock-names:
38    minItems: 1
39    maxItems: 3
40
41  '#clock-cells':
42    const: 1
43
44  power-domains:
45    maxItems: 1
46
47  '#power-domain-cells':
48    const: 1
49
50  '#reset-cells':
51    const: 1
52
53  qcom,adsp-pil-mode:
54    description:
55      Indicates if the LPASS would be brought out of reset using
56      peripheral loader.
57    type: boolean
58
59required:
60  - compatible
61  - reg
62  - clocks
63  - clock-names
64  - '#clock-cells'
65  - '#power-domain-cells'
66
67allOf:
68  - if:
69      properties:
70        compatible:
71          contains:
72            enum:
73              - qcom,qcm6490-lpassaudiocc
74              - qcom,sc7280-lpassaudiocc
75
76    then:
77      properties:
78        clocks:
79          items:
80            - description: Board XO source
81            - description: LPASS_AON_CC_MAIN_RCG_CLK_SRC
82
83        clock-names:
84          items:
85            - const: bi_tcxo
86            - const: lpass_aon_cc_main_rcg_clk_src
87
88        reg:
89          items:
90            - description: lpass core cc register
91            - description: lpass audio csr register
92  - if:
93      properties:
94        compatible:
95          contains:
96            enum:
97              - qcom,sc7280-lpassaoncc
98
99    then:
100      properties:
101        clocks:
102          items:
103            - description: Board XO source
104            - description: Board XO active only source
105            - description: LPASS_AON_CC_MAIN_RCG_CLK_SRC
106
107        clock-names:
108          items:
109            - const: bi_tcxo
110            - const: bi_tcxo_ao
111            - const: iface
112
113        reg:
114          maxItems: 1
115  - if:
116      properties:
117        compatible:
118          contains:
119            enum:
120              - qcom,sc7280-lpasshm
121              - qcom,sc7280-lpasscorecc
122
123    then:
124      properties:
125        clocks:
126          items:
127            - description: Board XO source
128
129        clock-names:
130          items:
131            - const: bi_tcxo
132
133        reg:
134          maxItems: 1
135
136additionalProperties: false
137
138examples:
139  - |
140    #include <dt-bindings/clock/qcom,rpmh.h>
141    #include <dt-bindings/clock/qcom,gcc-sc7280.h>
142    #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
143    #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
144    lpass_audiocc: clock-controller@3300000 {
145      compatible = "qcom,sc7280-lpassaudiocc";
146      reg = <0x3300000 0x30000>,
147            <0x32a9000 0x1000>;
148      clocks = <&rpmhcc RPMH_CXO_CLK>,
149               <&lpass_aon LPASS_AON_CC_MAIN_RCG_CLK_SRC>;
150      clock-names = "bi_tcxo", "lpass_aon_cc_main_rcg_clk_src";
151      power-domains = <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
152      #clock-cells = <1>;
153      #power-domain-cells = <1>;
154      #reset-cells = <1>;
155    };
156
157  - |
158    #include <dt-bindings/clock/qcom,rpmh.h>
159    #include <dt-bindings/clock/qcom,gcc-sc7280.h>
160    #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
161    #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
162    lpass_hm: clock-controller@3c00000 {
163      compatible = "qcom,sc7280-lpasshm";
164      reg = <0x3c00000 0x28>;
165      clocks = <&rpmhcc RPMH_CXO_CLK>;
166      clock-names = "bi_tcxo";
167      #clock-cells = <1>;
168      #power-domain-cells = <1>;
169    };
170
171  - |
172    #include <dt-bindings/clock/qcom,rpmh.h>
173    #include <dt-bindings/clock/qcom,gcc-sc7280.h>
174    #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
175    #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
176    lpasscore: clock-controller@3900000 {
177      compatible = "qcom,sc7280-lpasscorecc";
178      reg = <0x3900000 0x50000>;
179      clocks = <&rpmhcc RPMH_CXO_CLK>;
180      clock-names = "bi_tcxo";
181      power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>;
182      #clock-cells = <1>;
183      #power-domain-cells = <1>;
184    };
185
186  - |
187    #include <dt-bindings/clock/qcom,rpmh.h>
188    #include <dt-bindings/clock/qcom,gcc-sc7280.h>
189    #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
190    #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
191    lpass_aon: clock-controller@3380000 {
192      compatible = "qcom,sc7280-lpassaoncc";
193      reg = <0x3380000 0x30000>;
194      clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>,
195               <&lpasscore LPASS_CORE_CC_CORE_CLK>;
196      clock-names = "bi_tcxo", "bi_tcxo_ao","iface";
197      qcom,adsp-pil-mode;
198      #clock-cells = <1>;
199      #power-domain-cells = <1>;
200    };
201
202...
203