1*33b5cd95STaniya Das# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*33b5cd95STaniya Das%YAML 1.2 3*33b5cd95STaniya Das--- 4*33b5cd95STaniya Das$id: http://devicetree.org/schemas/clock/qcom,sa8775p-dispcc.yaml# 5*33b5cd95STaniya Das$schema: http://devicetree.org/meta-schemas/core.yaml# 6*33b5cd95STaniya Das 7*33b5cd95STaniya Dastitle: Qualcomm Display Clock & Reset Controller on SA8775P 8*33b5cd95STaniya Das 9*33b5cd95STaniya Dasmaintainers: 10*33b5cd95STaniya Das - Taniya Das <quic_tdas@quicinc.com> 11*33b5cd95STaniya Das 12*33b5cd95STaniya Dasdescription: | 13*33b5cd95STaniya Das Qualcomm display clock control module provides the clocks, resets and power 14*33b5cd95STaniya Das domains on SA8775P. 15*33b5cd95STaniya Das 16*33b5cd95STaniya Das See also: include/dt-bindings/clock/qcom,sa8775p-dispcc.h 17*33b5cd95STaniya Das 18*33b5cd95STaniya Dasproperties: 19*33b5cd95STaniya Das compatible: 20*33b5cd95STaniya Das enum: 21*33b5cd95STaniya Das - qcom,sa8775p-dispcc0 22*33b5cd95STaniya Das - qcom,sa8775p-dispcc1 23*33b5cd95STaniya Das 24*33b5cd95STaniya Das clocks: 25*33b5cd95STaniya Das items: 26*33b5cd95STaniya Das - description: GCC AHB clock source 27*33b5cd95STaniya Das - description: Board XO source 28*33b5cd95STaniya Das - description: Board XO_AO source 29*33b5cd95STaniya Das - description: Sleep clock source 30*33b5cd95STaniya Das - description: Link clock from DP0 PHY 31*33b5cd95STaniya Das - description: VCO DIV clock from DP0 PHY 32*33b5cd95STaniya Das - description: Link clock from DP1 PHY 33*33b5cd95STaniya Das - description: VCO DIV clock from DP1 PHY 34*33b5cd95STaniya Das - description: Byte clock from DSI0 PHY 35*33b5cd95STaniya Das - description: Pixel clock from DSI0 PHY 36*33b5cd95STaniya Das - description: Byte clock from DSI1 PHY 37*33b5cd95STaniya Das - description: Pixel clock from DSI1 PHY 38*33b5cd95STaniya Das 39*33b5cd95STaniya Das power-domains: 40*33b5cd95STaniya Das maxItems: 1 41*33b5cd95STaniya Das description: MMCX power domain 42*33b5cd95STaniya Das 43*33b5cd95STaniya Dasrequired: 44*33b5cd95STaniya Das - compatible 45*33b5cd95STaniya Das - clocks 46*33b5cd95STaniya Das - power-domains 47*33b5cd95STaniya Das - '#power-domain-cells' 48*33b5cd95STaniya Das 49*33b5cd95STaniya DasallOf: 50*33b5cd95STaniya Das - $ref: qcom,gcc.yaml# 51*33b5cd95STaniya Das 52*33b5cd95STaniya DasunevaluatedProperties: false 53*33b5cd95STaniya Das 54*33b5cd95STaniya Dasexamples: 55*33b5cd95STaniya Das - | 56*33b5cd95STaniya Das #include <dt-bindings/clock/qcom,rpmh.h> 57*33b5cd95STaniya Das #include <dt-bindings/power/qcom-rpmpd.h> 58*33b5cd95STaniya Das #include <dt-bindings/clock/qcom,sa8775p-gcc.h> 59*33b5cd95STaniya Das clock-controller@af00000 { 60*33b5cd95STaniya Das compatible = "qcom,sa8775p-dispcc0"; 61*33b5cd95STaniya Das reg = <0x0af00000 0x20000>; 62*33b5cd95STaniya Das clocks = <&gcc GCC_DISP_AHB_CLK>, 63*33b5cd95STaniya Das <&rpmhcc RPMH_CXO_CLK>, 64*33b5cd95STaniya Das <&rpmhcc RPMH_CXO_CLK_A>, 65*33b5cd95STaniya Das <&sleep_clk>, 66*33b5cd95STaniya Das <&dp_phy0 0>, 67*33b5cd95STaniya Das <&dp_phy0 1>, 68*33b5cd95STaniya Das <&dp_phy1 2>, 69*33b5cd95STaniya Das <&dp_phy1 3>, 70*33b5cd95STaniya Das <&dsi_phy0 0>, 71*33b5cd95STaniya Das <&dsi_phy0 1>, 72*33b5cd95STaniya Das <&dsi_phy1 2>, 73*33b5cd95STaniya Das <&dsi_phy1 3>; 74*33b5cd95STaniya Das power-domains = <&rpmhpd SA8775P_MMCX>; 75*33b5cd95STaniya Das #clock-cells = <1>; 76*33b5cd95STaniya Das #reset-cells = <1>; 77*33b5cd95STaniya Das #power-domain-cells = <1>; 78*33b5cd95STaniya Das }; 79*33b5cd95STaniya Das... 80