xref: /linux/Documentation/devicetree/bindings/clock/qcom,milos-camcc.yaml (revision 05d32474ab547fb097cfe3f3eb00a2aa7cdf4067) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,milos-camcc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Camera Clock & Reset Controller on Milos
8
9maintainers:
10  - Luca Weiss <luca.weiss@fairphone.com>
11
12description: |
13  Qualcomm camera clock control module provides the clocks, resets and power
14  domains on Milos.
15
16  See also: include/dt-bindings/clock/qcom,milos-camcc.h
17
18properties:
19  compatible:
20    const: qcom,milos-camcc
21
22  clocks:
23    items:
24      - description: Board XO source
25      - description: Sleep clock source
26      - description: Camera AHB clock from GCC
27
28  interconnects:
29    items:
30      - description: Interconnect path to enable the MultiMedia NoC
31
32required:
33  - compatible
34  - clocks
35
36allOf:
37  - $ref: qcom,gcc.yaml#
38
39unevaluatedProperties: false
40
41examples:
42  - |
43    #include <dt-bindings/clock/qcom,milos-gcc.h>
44    #include <dt-bindings/interconnect/qcom,icc.h>
45    #include <dt-bindings/interconnect/qcom,milos-rpmh.h>
46    clock-controller@adb0000 {
47        compatible = "qcom,milos-camcc";
48        reg = <0x0adb0000 0x40000>;
49        clocks = <&bi_tcxo_div2>,
50                 <&sleep_clk>,
51                 <&gcc GCC_CAMERA_AHB_CLK>;
52        interconnects = <&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS
53                         &mmss_noc SLAVE_MNOC_HF_MEM_NOC QCOM_ICC_TAG_ALWAYS>;
54        #clock-cells = <1>;
55        #reset-cells = <1>;
56        #power-domain-cells = <1>;
57    };
58
59...
60