xref: /linux/Documentation/devicetree/bindings/clock/qcom,hfpll.yaml (revision 6e7fd890f1d6ac83805409e9c346240de2705584) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,hfpll.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm High-Frequency PLL
8
9maintainers:
10  - Bjorn Andersson <andersson@kernel.org>
11
12description:
13  The HFPLL is used as CPU PLL on various Qualcomm SoCs.
14
15properties:
16  compatible:
17    oneOf:
18      - enum:
19          - qcom,msm8974-hfpll
20          - qcom,msm8976-hfpll-a53
21          - qcom,msm8976-hfpll-a72
22          - qcom,msm8976-hfpll-cci
23          - qcom,qcs404-hfpll
24      - const: qcom,hfpll
25        deprecated: true
26
27  reg:
28    items:
29      - description: HFPLL registers
30      - description: Alias register region
31    minItems: 1
32
33  '#clock-cells':
34    const: 0
35
36  clocks:
37    items:
38      - description: board XO clock
39
40  clock-names:
41    items:
42      - const: xo
43
44  clock-output-names:
45    description:
46      Name of the PLL. Typically hfpllX where X is a CPU number starting at 0.
47      Otherwise hfpll_Y where Y is more specific such as "l2".
48    maxItems: 1
49
50required:
51  - compatible
52  - reg
53  - '#clock-cells'
54  - clocks
55  - clock-names
56  - clock-output-names
57
58additionalProperties: false
59
60examples:
61  - |
62    clock-controller@f908a000 {
63        compatible = "qcom,msm8974-hfpll";
64        reg = <0xf908a000 0x30>, <0xf900a000 0x30>;
65        #clock-cells = <0>;
66        clock-output-names = "hfpll0";
67        clocks = <&xo_board>;
68        clock-names = "xo";
69    };
70