xref: /linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml (revision 9f2c9170934eace462499ba0bfe042cc72900173) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,gcc-sdx55.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Global Clock & Reset Controller on SDX55
8
9maintainers:
10  - Vinod Koul <vkoul@kernel.org>
11  - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
12
13description: |
14  Qualcomm global clock control module provides the clocks, resets and
15  power domains on SDX55
16
17  See also:: include/dt-bindings/clock/qcom,gcc-sdx55.h
18
19properties:
20  compatible:
21    const: qcom,gcc-sdx55
22
23  clocks:
24    items:
25      - description: Board XO source
26      - description: Sleep clock source
27      - description: PLL test clock source (Optional clock)
28    minItems: 2
29
30  clock-names:
31    items:
32      - const: bi_tcxo
33      - const: sleep_clk
34      - const: core_bi_pll_test_se # Optional clock
35    minItems: 2
36
37required:
38  - compatible
39  - clocks
40  - clock-names
41
42allOf:
43  - $ref: qcom,gcc.yaml#
44
45unevaluatedProperties: false
46
47examples:
48  - |
49    #include <dt-bindings/clock/qcom,rpmh.h>
50    clock-controller@100000 {
51      compatible = "qcom,gcc-sdx55";
52      reg = <0x00100000 0x1f0000>;
53      clocks = <&rpmhcc RPMH_CXO_CLK>,
54               <&sleep_clk>, <&pll_test_clk>;
55      clock-names = "bi_tcxo", "sleep_clk", "core_bi_pll_test_se";
56      #clock-cells = <1>;
57      #reset-cells = <1>;
58      #power-domain-cells = <1>;
59    };
60
61...
62