xref: /linux/Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml (revision 69e4b75a5b90ef74300c283c0aafe8d41daf13a8) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8953.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Global Clock & Reset Controller on MSM8953
8
9maintainers:
10  - Adam Skladowski <a_skl39@protonmail.com>
11  - Sireesh Kodali <sireeshkodali@protonmail.com>
12  - Barnabas Czeman <barnabas.czeman@mainlining.org>
13
14description: |
15  Qualcomm global clock control module provides the clocks, resets and power
16  domains on MSM8937 or MSM8953.
17
18  See also::
19    include/dt-bindings/clock/qcom,gcc-msm8917.h
20    include/dt-bindings/clock/qcom,gcc-msm8953.h
21
22properties:
23  compatible:
24    enum:
25      - qcom,gcc-msm8937
26      - qcom,gcc-msm8953
27
28  clocks:
29    items:
30      - description: Board XO source
31      - description: Sleep clock source
32      - description: Byte clock from DSI PHY0
33      - description: Pixel clock from DSI PHY0
34      - description: Byte clock from DSI PHY1
35      - description: Pixel clock from DSI PHY1
36
37  clock-names:
38    items:
39      - const: xo
40      - const: sleep
41      - const: dsi0pll
42      - const: dsi0pllbyte
43      - const: dsi1pll
44      - const: dsi1pllbyte
45
46required:
47  - compatible
48  - clocks
49  - clock-names
50  - '#power-domain-cells'
51
52allOf:
53  - $ref: qcom,gcc.yaml#
54
55unevaluatedProperties: false
56
57examples:
58  - |
59    #include <dt-bindings/clock/qcom,rpmcc.h>
60
61    clock-controller@1800000 {
62        compatible = "qcom,gcc-msm8953";
63        reg = <0x01800000 0x80000>;
64        clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
65                 <&sleep_clk>,
66                 <&dsi0_phy 1>,
67                 <&dsi0_phy 0>,
68                 <&dsi1_phy 1>,
69                 <&dsi1_phy 0>;
70        clock-names = "xo",
71                      "sleep",
72                      "dsi0pll",
73                      "dsi0pllbyte",
74                      "dsi1pll",
75                      "dsi1pllbyte";
76        #clock-cells = <1>;
77        #reset-cells = <1>;
78        #power-domain-cells = <1>;
79    };
80