xref: /linux/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9615.yaml (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0) 
1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,gcc-mdm9615.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Global Clock & Reset Controller
8
9maintainers:
10  - Stephen Boyd <sboyd@kernel.org>
11  - Taniya Das <quic_tdas@quicinc.com>
12
13description: |
14  Qualcomm global clock control module provides the clocks, resets and power
15  domains.
16
17  See also::
18    include/dt-bindings/clock/qcom,gcc-mdm9615.h
19
20allOf:
21  - $ref: qcom,gcc.yaml#
22
23properties:
24  compatible:
25    enum:
26      - qcom,gcc-mdm9615
27
28  clocks:
29    items:
30      - description: CXO clock
31      - description: PLL4 from LLC
32
33  '#power-domain-cells': false
34
35required:
36  - compatible
37
38unevaluatedProperties: false
39
40examples:
41  - |
42    clock-controller@900000 {
43      compatible = "qcom,gcc-mdm9615";
44      reg = <0x900000 0x4000>;
45      #clock-cells = <1>;
46      #reset-cells = <1>;
47      clocks = <&cxo_board>,
48               <&lcc_pll4>;
49    };
50...
51