1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/clock/qcom,a53pll.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm A53 PLL clock 8 9maintainers: 10 - Bjorn Andersson <andersson@kernel.org> 11 12description: 13 The A53 PLL on few Qualcomm platforms is the main CPU PLL used used for 14 frequencies above 1GHz. 15 16properties: 17 compatible: 18 enum: 19 - qcom,ipq5018-a53pll 20 - qcom,ipq5332-a53pll 21 - qcom,ipq6018-a53pll 22 - qcom,ipq8074-a53pll 23 - qcom,ipq9574-a73pll 24 - qcom,msm8226-a7pll 25 - qcom,msm8916-a53pll 26 - qcom,msm8939-a53pll 27 28 reg: 29 maxItems: 1 30 31 '#clock-cells': 32 const: 0 33 34 clocks: 35 items: 36 - description: board XO clock 37 38 clock-names: 39 items: 40 - const: xo 41 42 operating-points-v2: true 43 44 opp-table: 45 type: object 46 47required: 48 - compatible 49 - reg 50 - '#clock-cells' 51 52additionalProperties: false 53 54examples: 55 # Example 1 - A53 PLL found on MSM8916 devices 56 - | 57 a53pll: clock@b016000 { 58 compatible = "qcom,msm8916-a53pll"; 59 reg = <0xb016000 0x40>; 60 #clock-cells = <0>; 61 }; 62 # Example 2 - A53 PLL found on IPQ6018 devices 63 - | 64 a53pll_ipq: clock-controller@b116000 { 65 compatible = "qcom,ipq6018-a53pll"; 66 reg = <0x0b116000 0x40>; 67 #clock-cells = <0>; 68 clocks = <&xo>; 69 clock-names = "xo"; 70 }; 71