xref: /linux/Documentation/devicetree/bindings/clock/qcom,sm4450-gcc.yaml (revision d2d04deb5566b82aeb795f24014f5b3bdb8315ed)
1*d2d04debSAjit Pandey# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*d2d04debSAjit Pandey%YAML 1.2
3*d2d04debSAjit Pandey---
4*d2d04debSAjit Pandey$id: http://devicetree.org/schemas/clock/qcom,sm4450-gcc.yaml#
5*d2d04debSAjit Pandey$schema: http://devicetree.org/meta-schemas/core.yaml#
6*d2d04debSAjit Pandey
7*d2d04debSAjit Pandeytitle: Qualcomm Global Clock & Reset Controller on SM4450
8*d2d04debSAjit Pandey
9*d2d04debSAjit Pandeymaintainers:
10*d2d04debSAjit Pandey  - Ajit Pandey <quic_ajipan@quicinc.com>
11*d2d04debSAjit Pandey  - Taniya Das <quic_tdas@quicinc.com>
12*d2d04debSAjit Pandey
13*d2d04debSAjit Pandeydescription: |
14*d2d04debSAjit Pandey  Qualcomm global clock control module provides the clocks, resets and power
15*d2d04debSAjit Pandey  domains on SM4450
16*d2d04debSAjit Pandey
17*d2d04debSAjit Pandey  See also:: include/dt-bindings/clock/qcom,sm4450-gcc.h
18*d2d04debSAjit Pandey
19*d2d04debSAjit Pandeyproperties:
20*d2d04debSAjit Pandey  compatible:
21*d2d04debSAjit Pandey    const: qcom,sm4450-gcc
22*d2d04debSAjit Pandey
23*d2d04debSAjit Pandey  clocks:
24*d2d04debSAjit Pandey    items:
25*d2d04debSAjit Pandey      - description: Board XO source
26*d2d04debSAjit Pandey      - description: Sleep clock source
27*d2d04debSAjit Pandey      - description: UFS Phy Rx symbol 0 clock source
28*d2d04debSAjit Pandey      - description: UFS Phy Rx symbol 1 clock source
29*d2d04debSAjit Pandey      - description: UFS Phy Tx symbol 0 clock source
30*d2d04debSAjit Pandey      - description: USB3 Phy wrapper pipe clock source
31*d2d04debSAjit Pandey
32*d2d04debSAjit Pandeyrequired:
33*d2d04debSAjit Pandey  - compatible
34*d2d04debSAjit Pandey  - clocks
35*d2d04debSAjit Pandey
36*d2d04debSAjit PandeyallOf:
37*d2d04debSAjit Pandey  - $ref: qcom,gcc.yaml#
38*d2d04debSAjit Pandey
39*d2d04debSAjit PandeyunevaluatedProperties: false
40*d2d04debSAjit Pandey
41*d2d04debSAjit Pandeyexamples:
42*d2d04debSAjit Pandey  - |
43*d2d04debSAjit Pandey    #include <dt-bindings/clock/qcom,rpmh.h>
44*d2d04debSAjit Pandey    clock-controller@100000 {
45*d2d04debSAjit Pandey      compatible = "qcom,sm4450-gcc";
46*d2d04debSAjit Pandey      reg = <0x00100000 0x001f4200>;
47*d2d04debSAjit Pandey      clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>,
48*d2d04debSAjit Pandey               <&ufs_mem_phy 0>, <&ufs_mem_phy 1>,
49*d2d04debSAjit Pandey               <&ufs_mem_phy 2>, <&usb_1_qmpphy>;
50*d2d04debSAjit Pandey      #clock-cells = <1>;
51*d2d04debSAjit Pandey      #reset-cells = <1>;
52*d2d04debSAjit Pandey      #power-domain-cells = <1>;
53*d2d04debSAjit Pandey    };
54*d2d04debSAjit Pandey
55*d2d04debSAjit Pandey...
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