xref: /linux/Documentation/devicetree/bindings/clock/qcom,sm4450-gcc.yaml (revision b0ef3434da07e7516a89a80206af53ea81954a80)
1d2d04debSAjit Pandey# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2d2d04debSAjit Pandey%YAML 1.2
3d2d04debSAjit Pandey---
4d2d04debSAjit Pandey$id: http://devicetree.org/schemas/clock/qcom,sm4450-gcc.yaml#
5d2d04debSAjit Pandey$schema: http://devicetree.org/meta-schemas/core.yaml#
6d2d04debSAjit Pandey
7d2d04debSAjit Pandeytitle: Qualcomm Global Clock & Reset Controller on SM4450
8d2d04debSAjit Pandey
9d2d04debSAjit Pandeymaintainers:
10d2d04debSAjit Pandey  - Ajit Pandey <quic_ajipan@quicinc.com>
11d2d04debSAjit Pandey  - Taniya Das <quic_tdas@quicinc.com>
12d2d04debSAjit Pandey
13d2d04debSAjit Pandeydescription: |
14d2d04debSAjit Pandey  Qualcomm global clock control module provides the clocks, resets and power
15d2d04debSAjit Pandey  domains on SM4450
16d2d04debSAjit Pandey
17d2d04debSAjit Pandey  See also:: include/dt-bindings/clock/qcom,sm4450-gcc.h
18d2d04debSAjit Pandey
19d2d04debSAjit Pandeyproperties:
20d2d04debSAjit Pandey  compatible:
21d2d04debSAjit Pandey    const: qcom,sm4450-gcc
22d2d04debSAjit Pandey
23d2d04debSAjit Pandey  clocks:
24d2d04debSAjit Pandey    items:
25d2d04debSAjit Pandey      - description: Board XO source
26d2d04debSAjit Pandey      - description: Sleep clock source
27d2d04debSAjit Pandey      - description: UFS Phy Rx symbol 0 clock source
28d2d04debSAjit Pandey      - description: UFS Phy Rx symbol 1 clock source
29d2d04debSAjit Pandey      - description: UFS Phy Tx symbol 0 clock source
30d2d04debSAjit Pandey      - description: USB3 Phy wrapper pipe clock source
31d2d04debSAjit Pandey
32d2d04debSAjit Pandeyrequired:
33d2d04debSAjit Pandey  - compatible
34d2d04debSAjit Pandey  - clocks
35*b0ef3434SDmitry Baryshkov  - '#power-domain-cells'
36d2d04debSAjit Pandey
37d2d04debSAjit PandeyallOf:
38d2d04debSAjit Pandey  - $ref: qcom,gcc.yaml#
39d2d04debSAjit Pandey
40d2d04debSAjit PandeyunevaluatedProperties: false
41d2d04debSAjit Pandey
42d2d04debSAjit Pandeyexamples:
43d2d04debSAjit Pandey  - |
44d2d04debSAjit Pandey    #include <dt-bindings/clock/qcom,rpmh.h>
45d2d04debSAjit Pandey    clock-controller@100000 {
46d2d04debSAjit Pandey      compatible = "qcom,sm4450-gcc";
47d2d04debSAjit Pandey      reg = <0x00100000 0x001f4200>;
48d2d04debSAjit Pandey      clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>,
49d2d04debSAjit Pandey               <&ufs_mem_phy 0>, <&ufs_mem_phy 1>,
50d2d04debSAjit Pandey               <&ufs_mem_phy 2>, <&usb_1_qmpphy>;
51d2d04debSAjit Pandey      #clock-cells = <1>;
52d2d04debSAjit Pandey      #reset-cells = <1>;
53d2d04debSAjit Pandey      #power-domain-cells = <1>;
54d2d04debSAjit Pandey    };
55d2d04debSAjit Pandey
56d2d04debSAjit Pandey...
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