1*6ef11670SImran Shaik# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*6ef11670SImran Shaik%YAML 1.2 3*6ef11670SImran Shaik--- 4*6ef11670SImran Shaik$id: http://devicetree.org/schemas/clock/qcom,shikra-audiocorecc.yaml# 5*6ef11670SImran Shaik$schema: http://devicetree.org/meta-schemas/core.yaml# 6*6ef11670SImran Shaik 7*6ef11670SImran Shaiktitle: Audio Core Clock Controller for Qualcomm Shikra SoC 8*6ef11670SImran Shaik 9*6ef11670SImran Shaikmaintainers: 10*6ef11670SImran Shaik - Imran Shaik <imran.shaik@oss.qualcomm.com> 11*6ef11670SImran Shaik 12*6ef11670SImran Shaikdescription: | 13*6ef11670SImran Shaik Audio core clock control module provides the clocks on Qualcomm Shikra 14*6ef11670SImran Shaik SoC platform. 15*6ef11670SImran Shaik 16*6ef11670SImran Shaik See also: 17*6ef11670SImran Shaik - include/dt-bindings/clock/qcom,shikra-audiocorecc.h 18*6ef11670SImran Shaik 19*6ef11670SImran Shaikproperties: 20*6ef11670SImran Shaik compatible: 21*6ef11670SImran Shaik const: qcom,shikra-audiocorecc 22*6ef11670SImran Shaik 23*6ef11670SImran Shaik clocks: 24*6ef11670SImran Shaik items: 25*6ef11670SImran Shaik - description: Board XO source 26*6ef11670SImran Shaik - description: Board sleep clock 27*6ef11670SImran Shaik - description: Audio ref clock source 28*6ef11670SImran Shaik 29*6ef11670SImran Shaik reg: 30*6ef11670SImran Shaik maxItems: 1 31*6ef11670SImran Shaik 32*6ef11670SImran Shaik '#clock-cells': 33*6ef11670SImran Shaik const: 1 34*6ef11670SImran Shaik 35*6ef11670SImran Shaikrequired: 36*6ef11670SImran Shaik - compatible 37*6ef11670SImran Shaik - reg 38*6ef11670SImran Shaik - clocks 39*6ef11670SImran Shaik - '#clock-cells' 40*6ef11670SImran Shaik 41*6ef11670SImran ShaikadditionalProperties: false 42*6ef11670SImran Shaik 43*6ef11670SImran Shaikexamples: 44*6ef11670SImran Shaik - | 45*6ef11670SImran Shaik #include <dt-bindings/clock/qcom,rpmcc.h> 46*6ef11670SImran Shaik #include <dt-bindings/clock/qcom,shikra-gcc.h> 47*6ef11670SImran Shaik clock-controller@a0a0000 { 48*6ef11670SImran Shaik compatible = "qcom,shikra-audiocorecc"; 49*6ef11670SImran Shaik reg = <0x0a0a0000 0x10000>; 50*6ef11670SImran Shaik clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, 51*6ef11670SImran Shaik <&sleep_clk>, 52*6ef11670SImran Shaik <&aud_ref_clk_src>; 53*6ef11670SImran Shaik #clock-cells = <1>; 54*6ef11670SImran Shaik }; 55*6ef11670SImran Shaik... 56