1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/clock/qcom,sc7180-lpasscorecc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm LPASS Core Clock Controller on SC7180 8 9maintainers: 10 - Taniya Das <quic_tdas@quicinc.com> 11 12description: | 13 Qualcomm LPASS core clock control module provides the clocks and power 14 domains on SC7180. 15 16 See also:: include/dt-bindings/clock/qcom,lpasscorecc-sc7180.h 17 18properties: 19 compatible: 20 enum: 21 - qcom,sc7180-lpasshm 22 - qcom,sc7180-lpasscorecc 23 24 clocks: 25 items: 26 - description: gcc_lpass_sway clock from GCC 27 - description: Board XO source 28 29 clock-names: 30 items: 31 - const: iface 32 - const: bi_tcxo 33 34 power-domains: 35 maxItems: 1 36 37 '#clock-cells': 38 const: 1 39 40 '#power-domain-cells': 41 const: 1 42 43 reg: 44 minItems: 1 45 items: 46 - description: lpass core cc register 47 - description: lpass audio cc register 48 49 reg-names: 50 items: 51 - const: lpass_core_cc 52 - const: lpass_audio_cc 53 54if: 55 properties: 56 compatible: 57 contains: 58 const: qcom,sc7180-lpasshm 59then: 60 properties: 61 reg: 62 maxItems: 1 63 64else: 65 properties: 66 reg: 67 minItems: 2 68 69required: 70 - compatible 71 - reg 72 - clocks 73 - clock-names 74 - '#clock-cells' 75 - '#power-domain-cells' 76 77additionalProperties: false 78 79examples: 80 - | 81 #include <dt-bindings/clock/qcom,rpmh.h> 82 #include <dt-bindings/clock/qcom,gcc-sc7180.h> 83 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h> 84 clock-controller@63000000 { 85 compatible = "qcom,sc7180-lpasshm"; 86 reg = <0x63000000 0x28>; 87 clocks = <&gcc GCC_LPASS_CFG_NOC_SWAY_CLK>, <&rpmhcc RPMH_CXO_CLK>; 88 clock-names = "iface", "bi_tcxo"; 89 #clock-cells = <1>; 90 #power-domain-cells = <1>; 91 }; 92 93 - | 94 #include <dt-bindings/clock/qcom,rpmh.h> 95 #include <dt-bindings/clock/qcom,gcc-sc7180.h> 96 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h> 97 clock-controller@62d00000 { 98 compatible = "qcom,sc7180-lpasscorecc"; 99 reg = <0x62d00000 0x50000>, <0x62780000 0x30000>; 100 reg-names = "lpass_core_cc", "lpass_audio_cc"; 101 clocks = <&gcc GCC_LPASS_CFG_NOC_SWAY_CLK>, <&rpmhcc RPMH_CXO_CLK>; 102 clock-names = "iface", "bi_tcxo"; 103 power-domains = <&lpass_hm LPASS_CORE_HM_GDSCR>; 104 #clock-cells = <1>; 105 #power-domain-cells = <1>; 106 }; 107... 108