12283f9e0SIlia Lin# SPDX-License-Identifier: GPL-2.0-only 22283f9e0SIlia Lin%YAML 1.2 32283f9e0SIlia Lin--- 4ba937f51SLoic Poulain$id: http://devicetree.org/schemas/clock/qcom,msm8996-apcc.yaml# 52283f9e0SIlia Lin$schema: http://devicetree.org/meta-schemas/core.yaml# 62283f9e0SIlia Lin 72283f9e0SIlia Lintitle: Qualcomm clock controller for MSM8996 CPUs 82283f9e0SIlia Lin 92283f9e0SIlia Linmaintainers: 102283f9e0SIlia Lin - Loic Poulain <loic.poulain@linaro.org> 112283f9e0SIlia Lin 122283f9e0SIlia Lindescription: | 132283f9e0SIlia Lin Qualcomm CPU clock controller for MSM8996 CPUs, clock 0 is for Power cluster 142283f9e0SIlia Lin and clock 1 is for Perf cluster. 152283f9e0SIlia Lin 162283f9e0SIlia Linproperties: 172283f9e0SIlia Lin compatible: 182283f9e0SIlia Lin enum: 192283f9e0SIlia Lin - qcom,msm8996-apcc 202283f9e0SIlia Lin 212283f9e0SIlia Lin reg: 222283f9e0SIlia Lin maxItems: 1 232283f9e0SIlia Lin 242283f9e0SIlia Lin '#clock-cells': 252283f9e0SIlia Lin const: 1 262283f9e0SIlia Lin 272283f9e0SIlia Lin clocks: 282283f9e0SIlia Lin items: 29*b4feed4aSYassine Oudjana - description: XO source 302283f9e0SIlia Lin 312283f9e0SIlia Lin clock-names: 322283f9e0SIlia Lin items: 33*b4feed4aSYassine Oudjana - const: xo 342283f9e0SIlia Lin 352283f9e0SIlia Linrequired: 362283f9e0SIlia Lin - compatible 372283f9e0SIlia Lin - reg 382283f9e0SIlia Lin - '#clock-cells' 39*b4feed4aSYassine Oudjana - clocks 40*b4feed4aSYassine Oudjana - clock-names 412283f9e0SIlia Lin 422283f9e0SIlia LinadditionalProperties: false 432283f9e0SIlia Lin 442283f9e0SIlia Linexamples: 452283f9e0SIlia Lin - | 462283f9e0SIlia Lin kryocc: clock-controller@6400000 { 472283f9e0SIlia Lin compatible = "qcom,msm8996-apcc"; 482283f9e0SIlia Lin reg = <0x6400000 0x90000>; 492283f9e0SIlia Lin #clock-cells = <1>; 50*b4feed4aSYassine Oudjana 51*b4feed4aSYassine Oudjana clocks = <&xo_board>; 52*b4feed4aSYassine Oudjana clock-names = "xo"; 532283f9e0SIlia Lin }; 54