xref: /linux/Documentation/devicetree/bindings/clock/qcom,glymur-tcsr.yaml (revision 502d45774af09f1c681c754c4b7cdfb5d7f72fd9)
1f9cbc4bdSQiang Yu# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2f9cbc4bdSQiang Yu%YAML 1.2
3f9cbc4bdSQiang Yu---
4f9cbc4bdSQiang Yu$id: http://devicetree.org/schemas/clock/qcom,glymur-tcsr.yaml#
5f9cbc4bdSQiang Yu$schema: http://devicetree.org/meta-schemas/core.yaml#
6f9cbc4bdSQiang Yu
7f9cbc4bdSQiang Yutitle: Qualcomm TCSR Clock Controller on Glymur
8f9cbc4bdSQiang Yu
9f9cbc4bdSQiang Yumaintainers:
10f9cbc4bdSQiang Yu  - Bjorn Andersson <andersson@kernel.org>
11f9cbc4bdSQiang Yu  - Taniya Das <taniya.das@oss.qualcomm.com>
12f9cbc4bdSQiang Yu
13f9cbc4bdSQiang Yudescription: |
14f9cbc4bdSQiang Yu  Qualcomm TCSR clock control module provides the clocks, resets and
15f9cbc4bdSQiang Yu  power domains on Glymur
16f9cbc4bdSQiang Yu
17f9cbc4bdSQiang Yu  See also:
18f9cbc4bdSQiang Yu  - include/dt-bindings/clock/qcom,glymur-tcsr.h
19f9cbc4bdSQiang Yu
20f9cbc4bdSQiang Yuproperties:
21f9cbc4bdSQiang Yu  compatible:
22f9cbc4bdSQiang Yu    items:
23f9cbc4bdSQiang Yu      - enum:
24f9cbc4bdSQiang Yu          - qcom,glymur-tcsr
25*0998cf30SQiang Yu          - qcom,mahua-tcsr
26f9cbc4bdSQiang Yu      - const: syscon
27f9cbc4bdSQiang Yu
28f9cbc4bdSQiang Yu  clocks:
29f9cbc4bdSQiang Yu    items:
30f9cbc4bdSQiang Yu      - description: TCXO pad clock
31f9cbc4bdSQiang Yu
32f9cbc4bdSQiang Yu  reg:
33f9cbc4bdSQiang Yu    maxItems: 1
34f9cbc4bdSQiang Yu
35f9cbc4bdSQiang Yu  '#clock-cells':
36f9cbc4bdSQiang Yu    const: 1
37f9cbc4bdSQiang Yu
38f9cbc4bdSQiang Yu  '#reset-cells':
39f9cbc4bdSQiang Yu    const: 1
40f9cbc4bdSQiang Yu
41f9cbc4bdSQiang Yu  vdda-qrefrpt0-0p9-supply: true
42f9cbc4bdSQiang Yu  vdda-qrefrpt1-0p9-supply: true
43f9cbc4bdSQiang Yu  vdda-qrefrpt2-0p9-supply: true
44f9cbc4bdSQiang Yu  vdda-qrefrpt3-0p9-supply: true
45f9cbc4bdSQiang Yu  vdda-qrefrpt4-0p9-supply: true
46f9cbc4bdSQiang Yu  vdda-qrefrpt5-0p9-supply: true
47f9cbc4bdSQiang Yu  vdda-qrefrx0-0p9-supply: true
48f9cbc4bdSQiang Yu  vdda-qrefrx1-0p9-supply: true
49f9cbc4bdSQiang Yu  vdda-qrefrx2-0p9-supply: true
50f9cbc4bdSQiang Yu  vdda-qrefrx3-0p9-supply: true
51f9cbc4bdSQiang Yu  vdda-qrefrx4-0p9-supply: true
52f9cbc4bdSQiang Yu  vdda-qrefrx5-0p9-supply: true
53f9cbc4bdSQiang Yu  vdda-qreftx0-0p9-supply: true
54f9cbc4bdSQiang Yu  vdda-qreftx0-1p2-supply: true
55f9cbc4bdSQiang Yu  vdda-qreftx1-0p9-supply: true
56f9cbc4bdSQiang Yu  vdda-refgen3-0p9-supply: true
57f9cbc4bdSQiang Yu  vdda-refgen3-1p2-supply: true
58f9cbc4bdSQiang Yu  vdda-refgen4-0p9-supply: true
59f9cbc4bdSQiang Yu  vdda-refgen4-1p2-supply: true
60f9cbc4bdSQiang Yu
61f9cbc4bdSQiang YuallOf:
62f9cbc4bdSQiang Yu  - if:
63f9cbc4bdSQiang Yu      properties:
64f9cbc4bdSQiang Yu        compatible:
65f9cbc4bdSQiang Yu          contains:
66f9cbc4bdSQiang Yu            const: qcom,glymur-tcsr
67f9cbc4bdSQiang Yu    then:
68f9cbc4bdSQiang Yu      required:
69f9cbc4bdSQiang Yu        - vdda-qrefrpt0-0p9-supply
70f9cbc4bdSQiang Yu        - vdda-qrefrpt1-0p9-supply
71f9cbc4bdSQiang Yu        - vdda-qrefrpt2-0p9-supply
72f9cbc4bdSQiang Yu        - vdda-qrefrpt3-0p9-supply
73f9cbc4bdSQiang Yu        - vdda-qrefrpt4-0p9-supply
74f9cbc4bdSQiang Yu        - vdda-qrefrx0-0p9-supply
75f9cbc4bdSQiang Yu        - vdda-qrefrx1-0p9-supply
76f9cbc4bdSQiang Yu        - vdda-qrefrx2-0p9-supply
77f9cbc4bdSQiang Yu        - vdda-qrefrx4-0p9-supply
78f9cbc4bdSQiang Yu        - vdda-qrefrx5-0p9-supply
79f9cbc4bdSQiang Yu        - vdda-qreftx0-0p9-supply
80f9cbc4bdSQiang Yu        - vdda-qreftx0-1p2-supply
81f9cbc4bdSQiang Yu        - vdda-qreftx1-0p9-supply
82f9cbc4bdSQiang Yu        - vdda-refgen3-0p9-supply
83f9cbc4bdSQiang Yu        - vdda-refgen3-1p2-supply
84f9cbc4bdSQiang Yu        - vdda-refgen4-0p9-supply
85f9cbc4bdSQiang Yu        - vdda-refgen4-1p2-supply
86*0998cf30SQiang Yu  - if:
87*0998cf30SQiang Yu      properties:
88*0998cf30SQiang Yu        compatible:
89*0998cf30SQiang Yu          contains:
90*0998cf30SQiang Yu            const: qcom,mahua-tcsr
91*0998cf30SQiang Yu    then:
92*0998cf30SQiang Yu      required:
93*0998cf30SQiang Yu        - vdda-qrefrpt0-0p9-supply
94*0998cf30SQiang Yu        - vdda-qrefrpt1-0p9-supply
95*0998cf30SQiang Yu        - vdda-qrefrpt2-0p9-supply
96*0998cf30SQiang Yu        - vdda-qrefrpt3-0p9-supply
97*0998cf30SQiang Yu        - vdda-qrefrpt4-0p9-supply
98*0998cf30SQiang Yu        - vdda-qrefrpt5-0p9-supply
99*0998cf30SQiang Yu        - vdda-qrefrx1-0p9-supply
100*0998cf30SQiang Yu        - vdda-qrefrx2-0p9-supply
101*0998cf30SQiang Yu        - vdda-qrefrx3-0p9-supply
102*0998cf30SQiang Yu        - vdda-qreftx1-0p9-supply
103*0998cf30SQiang Yu        - vdda-refgen3-0p9-supply
104*0998cf30SQiang Yu        - vdda-refgen3-1p2-supply
105f9cbc4bdSQiang Yu
106f9cbc4bdSQiang Yurequired:
107f9cbc4bdSQiang Yu  - compatible
108f9cbc4bdSQiang Yu  - clocks
109f9cbc4bdSQiang Yu
110f9cbc4bdSQiang YuadditionalProperties: false
111f9cbc4bdSQiang Yu
112f9cbc4bdSQiang Yuexamples:
113f9cbc4bdSQiang Yu  - |
114f9cbc4bdSQiang Yu    #include <dt-bindings/clock/qcom,rpmh.h>
115f9cbc4bdSQiang Yu
116f9cbc4bdSQiang Yu    soc {
117f9cbc4bdSQiang Yu      #address-cells = <2>;
118f9cbc4bdSQiang Yu      #size-cells = <2>;
119f9cbc4bdSQiang Yu
120f9cbc4bdSQiang Yu      clock-controller@1fd5000 {
121f9cbc4bdSQiang Yu        compatible = "qcom,glymur-tcsr", "syscon";
122f9cbc4bdSQiang Yu        reg = <0x0 0x1fd5000 0x0 0x21000>;
123f9cbc4bdSQiang Yu        clocks = <&rpmhcc RPMH_CXO_CLK>;
124f9cbc4bdSQiang Yu        #clock-cells = <1>;
125f9cbc4bdSQiang Yu        #reset-cells = <1>;
126f9cbc4bdSQiang Yu        vdda-qrefrpt0-0p9-supply = <&vreg_l1a>;
127f9cbc4bdSQiang Yu        vdda-qrefrpt1-0p9-supply = <&vreg_l1a>;
128f9cbc4bdSQiang Yu        vdda-qrefrpt2-0p9-supply = <&vreg_l1a>;
129f9cbc4bdSQiang Yu        vdda-qrefrpt3-0p9-supply = <&vreg_l1a>;
130f9cbc4bdSQiang Yu        vdda-qrefrpt4-0p9-supply = <&vreg_l1a>;
131f9cbc4bdSQiang Yu        vdda-qrefrx0-0p9-supply = <&vreg_l1a>;
132f9cbc4bdSQiang Yu        vdda-qrefrx1-0p9-supply = <&vreg_l1a>;
133f9cbc4bdSQiang Yu        vdda-qrefrx2-0p9-supply = <&vreg_l1a>;
134f9cbc4bdSQiang Yu        vdda-qrefrx4-0p9-supply = <&vreg_l1a>;
135f9cbc4bdSQiang Yu        vdda-qrefrx5-0p9-supply = <&vreg_l1a>;
136f9cbc4bdSQiang Yu        vdda-qreftx0-0p9-supply = <&vreg_l1a>;
137f9cbc4bdSQiang Yu        vdda-qreftx0-1p2-supply = <&vreg_l2a>;
138f9cbc4bdSQiang Yu        vdda-qreftx1-0p9-supply = <&vreg_l1a>;
139f9cbc4bdSQiang Yu        vdda-refgen3-0p9-supply = <&vreg_l1a>;
140f9cbc4bdSQiang Yu        vdda-refgen3-1p2-supply = <&vreg_l2a>;
141f9cbc4bdSQiang Yu        vdda-refgen4-0p9-supply = <&vreg_l1a>;
142f9cbc4bdSQiang Yu        vdda-refgen4-1p2-supply = <&vreg_l2a>;
143f9cbc4bdSQiang Yu      };
144f9cbc4bdSQiang Yu    };
145f9cbc4bdSQiang Yu
146f9cbc4bdSQiang Yu...
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