xref: /linux/Documentation/devicetree/bindings/clock/qcom,gcc-sm8450.yaml (revision 48ee4835b73c48590d05a54730dc8037ebd39d3b) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,gcc-sm8450.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Global Clock & Reset Controller Binding for SM8450
8
9maintainers:
10  - Vinod Koul <vkoul@kernel.org>
11
12description: |
13  Qualcomm global clock control module which supports the clocks, resets and
14  power domains on SM8450
15
16  See also:
17  - dt-bindings/clock/qcom,gcc-sm8450.h
18
19properties:
20  compatible:
21    const: qcom,gcc-sm8450
22
23  clocks:
24    items:
25      - description: Board XO source
26      - description: Sleep clock source
27      - description: PCIE 0 Pipe clock source (Optional clock)
28      - description: PCIE 1 Pipe clock source (Optional clock)
29      - description: PCIE 1 Phy Auxillary clock source (Optional clock)
30      - description: UFS Phy Rx symbol 0 clock source (Optional clock)
31      - description: UFS Phy Rx symbol 1 clock source (Optional clock)
32      - description: UFS Phy Tx symbol 0 clock source (Optional clock)
33      - description: USB3 Phy wrapper pipe clock source (Optional clock)
34    minItems: 2
35
36  clock-names:
37    items:
38      - const: bi_tcxo
39      - const: sleep_clk
40      - const: pcie_0_pipe_clk # Optional clock
41      - const: pcie_1_pipe_clk # Optional clock
42      - const: pcie_1_phy_aux_clk # Optional clock
43      - const: ufs_phy_rx_symbol_0_clk # Optional clock
44      - const: ufs_phy_rx_symbol_1_clk # Optional clock
45      - const: ufs_phy_tx_symbol_0_clk # Optional clock
46      - const: usb3_phy_wrapper_gcc_usb30_pipe_clk # Optional clock
47    minItems: 2
48
49  '#clock-cells':
50    const: 1
51
52  '#reset-cells':
53    const: 1
54
55  '#power-domain-cells':
56    const: 1
57
58  reg:
59    maxItems: 1
60
61required:
62  - compatible
63  - reg
64  - clocks
65  - clock-names
66  - '#clock-cells'
67  - '#reset-cells'
68  - '#power-domain-cells'
69
70additionalProperties: false
71
72examples:
73  - |
74    #include <dt-bindings/clock/qcom,rpmh.h>
75    clock-controller@100000 {
76      compatible = "qcom,gcc-sm8450";
77      reg = <0x00100000 0x001f4200>;
78      clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>;
79      clock-names = "bi_tcxo", "sleep_clk";
80      #clock-cells = <1>;
81      #reset-cells = <1>;
82      #power-domain-cells = <1>;
83    };
84
85...
86