xref: /linux/Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.yaml (revision 1a931707ad4a46e79d4ecfee56d8f6e8cc8d4f28) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,aoncc-sm8250.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: LPASS Always ON Clock Controller on SM8250 SoCs
8
9maintainers:
10  - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
11
12description: |
13  The clock consumer should specify the desired clock by having the clock
14  ID in its "clocks" phandle cell.
15  See include/dt-bindings/clock/qcom,sm8250-lpass-aoncc.h for the full list
16  of Audio Clock controller clock IDs.
17
18properties:
19  compatible:
20    const: qcom,sm8250-lpass-aoncc
21
22  reg:
23    maxItems: 1
24
25  '#clock-cells':
26    const: 1
27
28  clocks:
29    items:
30      - description: LPASS Core voting clock
31      - description: LPASS Audio codec voting clock
32      - description: Glitch Free Mux register clock
33
34  clock-names:
35    items:
36      - const: core
37      - const: audio
38      - const: bus
39
40required:
41  - compatible
42  - reg
43  - '#clock-cells'
44  - clocks
45  - clock-names
46
47additionalProperties: false
48
49examples:
50  - |
51    #include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h>
52    #include <dt-bindings/sound/qcom,q6afe.h>
53    clock-controller@3800000 {
54      #clock-cells = <1>;
55      compatible = "qcom,sm8250-lpass-aoncc";
56      reg = <0x03380000 0x40000>;
57      clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
58               <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
59               <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
60      clock-names = "core", "audio", "bus";
61    };
62