1* Nuvoton NPCM7XX Clock Controller 2 3Nuvoton Poleg BMC NPCM7XX contains an integrated clock controller, which 4generates and supplies clocks to all modules within the BMC. 5 6External clocks: 7 8There are six fixed clocks that are generated outside the BMC. All clocks are of 9a known fixed value that cannot be changed. clk_refclk, clk_mcbypck and 10clk_sysbypck are inputs to the clock controller. 11clk_rg1refck, clk_rg2refck and clk_xin are external clocks suppling the 12network. They are set on the device tree, but not used by the clock module. The 13network devices use them directly. 14Example can be found below. 15 16All available clocks are defined as preprocessor macros in: 17dt-bindings/clock/nuvoton,npcm7xx-clock.h 18and can be reused as DT sources. 19 20Required Properties of clock controller: 21 22 - compatible: "nuvoton,npcm750-clk" : for clock controller of Nuvoton 23 Poleg BMC NPCM750 24 25 - reg: physical base address of the clock controller and length of 26 memory mapped region. 27 28 - #clock-cells: should be 1. 29 30Example: Clock controller node: 31 32 clk: clock-controller@f0801000 { 33 compatible = "nuvoton,npcm750-clk"; 34 #clock-cells = <1>; 35 reg = <0xf0801000 0x1000>; 36 clock-names = "refclk", "sysbypck", "mcbypck"; 37 clocks = <&clk_refclk>, <&clk_sysbypck>, <&clk_mcbypck>; 38 }; 39 40Example: Required external clocks for network: 41 42 /* external reference clock */ 43 clk_refclk: clk-refclk { 44 compatible = "fixed-clock"; 45 #clock-cells = <0>; 46 clock-frequency = <25000000>; 47 clock-output-names = "refclk"; 48 }; 49 50 /* external reference clock for cpu. float in normal operation */ 51 clk_sysbypck: clk-sysbypck { 52 compatible = "fixed-clock"; 53 #clock-cells = <0>; 54 clock-frequency = <800000000>; 55 clock-output-names = "sysbypck"; 56 }; 57 58 /* external reference clock for MC. float in normal operation */ 59 clk_mcbypck: clk-mcbypck { 60 compatible = "fixed-clock"; 61 #clock-cells = <0>; 62 clock-frequency = <800000000>; 63 clock-output-names = "mcbypck"; 64 }; 65 66 /* external clock signal rg1refck, supplied by the phy */ 67 clk_rg1refck: clk-rg1refck { 68 compatible = "fixed-clock"; 69 #clock-cells = <0>; 70 clock-frequency = <125000000>; 71 clock-output-names = "clk_rg1refck"; 72 }; 73 74 /* external clock signal rg2refck, supplied by the phy */ 75 clk_rg2refck: clk-rg2refck { 76 compatible = "fixed-clock"; 77 #clock-cells = <0>; 78 clock-frequency = <125000000>; 79 clock-output-names = "clk_rg2refck"; 80 }; 81 82 clk_xin: clk-xin { 83 compatible = "fixed-clock"; 84 #clock-cells = <0>; 85 clock-frequency = <50000000>; 86 clock-output-names = "clk_xin"; 87 }; 88 89 90Example: GMAC controller node that consumes two clocks: a generated clk by the 91clock controller and a fixed clock from DT (clk_rg1refck). 92 93 ethernet0: ethernet@f0802000 { 94 compatible = "snps,dwmac"; 95 reg = <0xf0802000 0x2000>; 96 interrupts = <0 14 4>; 97 interrupt-names = "macirq"; 98 clocks = <&clk_rg1refck>, <&clk NPCM7XX_CLK_AHB>; 99 clock-names = "stmmaceth", "clk_gmac"; 100 }; 101