1*c952e507SDaniel Palmer# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*c952e507SDaniel Palmer%YAML 1.2 3*c952e507SDaniel Palmer--- 4*c952e507SDaniel Palmer$id: http://devicetree.org/schemas/clock/mstar,msc313-cpupll.yaml# 5*c952e507SDaniel Palmer$schema: http://devicetree.org/meta-schemas/core.yaml# 6*c952e507SDaniel Palmer 7*c952e507SDaniel Palmertitle: MStar/Sigmastar MSC313 CPU PLL 8*c952e507SDaniel Palmer 9*c952e507SDaniel Palmermaintainers: 10*c952e507SDaniel Palmer - Daniel Palmer <daniel@thingy.jp> 11*c952e507SDaniel Palmer 12*c952e507SDaniel Palmerdescription: | 13*c952e507SDaniel Palmer The MStar/SigmaStar MSC313 and later ARMv7 chips have a scalable 14*c952e507SDaniel Palmer PLL that can be used as the clock source for the CPU(s). 15*c952e507SDaniel Palmer 16*c952e507SDaniel Palmerproperties: 17*c952e507SDaniel Palmer compatible: 18*c952e507SDaniel Palmer const: mstar,msc313-cpupll 19*c952e507SDaniel Palmer 20*c952e507SDaniel Palmer "#clock-cells": 21*c952e507SDaniel Palmer const: 1 22*c952e507SDaniel Palmer 23*c952e507SDaniel Palmer clocks: 24*c952e507SDaniel Palmer maxItems: 1 25*c952e507SDaniel Palmer 26*c952e507SDaniel Palmer reg: 27*c952e507SDaniel Palmer maxItems: 1 28*c952e507SDaniel Palmer 29*c952e507SDaniel Palmerrequired: 30*c952e507SDaniel Palmer - compatible 31*c952e507SDaniel Palmer - "#clock-cells" 32*c952e507SDaniel Palmer - clocks 33*c952e507SDaniel Palmer - reg 34*c952e507SDaniel Palmer 35*c952e507SDaniel PalmeradditionalProperties: false 36*c952e507SDaniel Palmer 37*c952e507SDaniel Palmerexamples: 38*c952e507SDaniel Palmer - | 39*c952e507SDaniel Palmer #include <dt-bindings/clock/mstar-msc313-mpll.h> 40*c952e507SDaniel Palmer cpupll: cpupll@206400 { 41*c952e507SDaniel Palmer compatible = "mstar,msc313-cpupll"; 42*c952e507SDaniel Palmer reg = <0x206400 0x200>; 43*c952e507SDaniel Palmer #clock-cells = <1>; 44*c952e507SDaniel Palmer clocks = <&mpll MSTAR_MSC313_MPLL_DIV2>; 45*c952e507SDaniel Palmer }; 46