xref: /linux/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml (revision c17ee635fd3a482b2ad2bf5e269755c2eae5f25e) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/microchip,mpfs-ccc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Microchip PolarFire SoC Fabric Clock Conditioning Circuitry
8
9maintainers:
10  - Conor Dooley <conor.dooley@microchip.com>
11
12description: |
13  Microchip PolarFire SoC has 4 Clock Conditioning Circuitry blocks. Each of
14  these blocks contains two PLLs and 2 DLLs & are located in the four corners of
15  the FPGA. For more information see "PolarFire SoC FPGA Clocking Resources" at:
16  https://onlinedocs.microchip.com/pr/GUID-8F0CC4C0-0317-4262-89CA-CE7773ED1931-en-US-1/index.html
17
18properties:
19  compatible:
20    oneOf:
21      - items:
22          - const: microchip,pic64gx-ccc
23          - const: microchip,mpfs-ccc
24      - const: microchip,mpfs-ccc
25
26  reg:
27    items:
28      - description: PLL0's control registers
29      - description: PLL1's control registers
30      - description: DLL0's control registers
31      - description: DLL1's control registers
32
33  clocks:
34    description:
35      The CCC PLL's have two input clocks. It is required that even if the input
36      clocks are identical that both are provided.
37    minItems: 2
38    items:
39      - description: PLL0's refclk0
40      - description: PLL0's refclk1
41      - description: PLL1's refclk0
42      - description: PLL1's refclk1
43      - description: DLL0's refclk
44      - description: DLL1's refclk
45
46  clock-names:
47    minItems: 2
48    items:
49      - const: pll0_ref0
50      - const: pll0_ref1
51      - const: pll1_ref0
52      - const: pll1_ref1
53      - const: dll0_ref
54      - const: dll1_ref
55
56  '#clock-cells':
57    const: 1
58    description: |
59      The clock consumer should specify the desired clock by having the clock
60      ID in its "clocks" phandle cell.
61      See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list of
62      PolarFire clock IDs.
63
64required:
65  - compatible
66  - reg
67  - clocks
68  - clock-names
69  - '#clock-cells'
70
71additionalProperties: false
72
73examples:
74  - |
75    clock-controller@38100000 {
76        compatible = "microchip,mpfs-ccc";
77        reg = <0x38010000 0x1000>, <0x38020000 0x1000>,
78              <0x39010000 0x1000>, <0x39020000 0x1000>;
79        #clock-cells = <1>;
80        clocks = <&refclk_ccc>, <&refclk_ccc>, <&refclk_ccc>, <&refclk_ccc>,
81                  <&refclk_ccc>, <&refclk_ccc>;
82        clock-names = "pll0_ref0", "pll0_ref1", "pll1_ref0", "pll1_ref1",
83                      "dll0_ref", "dll1_ref";
84    };
85