xref: /linux/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml (revision cb787f4ac0c2e439ea8d7e6387b925f74576bdf8) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/mediatek,apmixedsys.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MediaTek AP Mixedsys Controller
8
9maintainers:
10  - Michael Turquette <mturquette@baylibre.com>
11  - Stephen Boyd <sboyd@kernel.org>
12
13description:
14  The Mediatek apmixedsys controller provides PLLs to the system.
15  The clock values can be found in <dt-bindings/clock/mt*-clk.h>.
16
17properties:
18  compatible:
19    oneOf:
20      - enum:
21          - mediatek,mt6797-apmixedsys
22          - mediatek,mt7622-apmixedsys
23          - mediatek,mt7981-apmixedsys
24          - mediatek,mt7986-apmixedsys
25          - mediatek,mt7988-apmixedsys
26          - mediatek,mt8135-apmixedsys
27          - mediatek,mt8173-apmixedsys
28          - mediatek,mt8516-apmixedsys
29      - items:
30          - const: mediatek,mt7623-apmixedsys
31          - const: mediatek,mt2701-apmixedsys
32          - const: syscon
33      - items:
34          - enum:
35              - mediatek,mt2701-apmixedsys
36              - mediatek,mt2712-apmixedsys
37              - mediatek,mt6765-apmixedsys
38              - mediatek,mt6779-apmixed
39              - mediatek,mt6795-apmixedsys
40              - mediatek,mt7629-apmixedsys
41              - mediatek,mt8167-apmixedsys
42              - mediatek,mt8183-apmixedsys
43          - const: syscon
44
45  reg:
46    maxItems: 1
47
48  '#clock-cells':
49    const: 1
50
51required:
52  - compatible
53  - reg
54  - '#clock-cells'
55
56additionalProperties: false
57
58examples:
59  - |
60    apmixedsys: clock-controller@10209000 {
61        compatible = "mediatek,mt8173-apmixedsys";
62        reg = <0x10209000 0x1000>;
63        #clock-cells = <1>;
64    };
65