xref: /linux/Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml (revision ee628d9cc8d5b96fdceeb270cf662efc4f85f2b6) 
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/marvell,pxa1908.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Marvell PXA1908 Clock Controllers
8
9maintainers:
10  - Duje Mihanović <duje.mihanovic@skole.hr>
11
12description: |
13  The PXA1908 clock subsystem generates and supplies clock to various
14  controllers within the PXA1908 SoC. The PXA1908 contains numerous clock
15  controller blocks, with the ones currently supported being APBC, APBCP, MPMU
16  and APMU roughly corresponding to internal buses.
17
18  All these clock identifiers could be found in <include/dt-bindings/marvell,pxa1908.h>.
19
20properties:
21  compatible:
22    oneOf:
23      - enum:
24          - marvell,pxa1908-apbc
25          - marvell,pxa1908-apbcp
26          - marvell,pxa1908-mpmu
27      - items:
28          - const: marvell,pxa1908-apmu
29          - const: syscon
30
31  reg:
32    maxItems: 1
33
34  '#clock-cells':
35    const: 1
36
37  '#power-domain-cells':
38    const: 1
39
40required:
41  - compatible
42  - reg
43  - '#clock-cells'
44
45additionalProperties: false
46
47if:
48  not:
49    properties:
50      compatible:
51        contains:
52          const: marvell,pxa1908-apmu
53
54then:
55  properties:
56    '#power-domain-cells': false
57
58examples:
59  # APMU block:
60  - |
61    clock-controller@d4282800 {
62      compatible = "marvell,pxa1908-apmu", "syscon";
63      reg = <0xd4282800 0x400>;
64      #clock-cells = <1>;
65      #power-domain-cells = <1>;
66    };
67