1*ed4ce1d9SRob Herring (Arm)# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*ed4ce1d9SRob Herring (Arm)%YAML 1.2 3*ed4ce1d9SRob Herring (Arm)--- 4*ed4ce1d9SRob Herring (Arm)$id: http://devicetree.org/schemas/clock/marvell,armada-3700-periph-clock.yaml# 5*ed4ce1d9SRob Herring (Arm)$schema: http://devicetree.org/meta-schemas/core.yaml# 6*ed4ce1d9SRob Herring (Arm) 7*ed4ce1d9SRob Herring (Arm)title: Marvell Armada 37xx SoCs Peripheral Clocks 8*ed4ce1d9SRob Herring (Arm) 9*ed4ce1d9SRob Herring (Arm)maintainers: 10*ed4ce1d9SRob Herring (Arm) - Andrew Lunn <andrew@lunn.ch> 11*ed4ce1d9SRob Herring (Arm) - Gregory Clement <gregory.clement@bootlin.com> 12*ed4ce1d9SRob Herring (Arm) 13*ed4ce1d9SRob Herring (Arm)description: > 14*ed4ce1d9SRob Herring (Arm) Marvell Armada 37xx SoCs provide peripheral clocks which are used as clock 15*ed4ce1d9SRob Herring (Arm) source for the peripheral of the SoC. 16*ed4ce1d9SRob Herring (Arm) 17*ed4ce1d9SRob Herring (Arm) There are two different blocks associated to north bridge and south bridge. 18*ed4ce1d9SRob Herring (Arm) 19*ed4ce1d9SRob Herring (Arm) The following is a list of provided IDs for Armada 3700 North bridge clocks: 20*ed4ce1d9SRob Herring (Arm) 21*ed4ce1d9SRob Herring (Arm) ID Clock name Description 22*ed4ce1d9SRob Herring (Arm) ----------------------------------- 23*ed4ce1d9SRob Herring (Arm) 0 mmc MMC controller 24*ed4ce1d9SRob Herring (Arm) 1 sata_host Sata Host 25*ed4ce1d9SRob Herring (Arm) 2 sec_at Security AT 26*ed4ce1d9SRob Herring (Arm) 3 sac_dap Security DAP 27*ed4ce1d9SRob Herring (Arm) 4 tsecm Security Engine 28*ed4ce1d9SRob Herring (Arm) 5 setm_tmx Serial Embedded Trace Module 29*ed4ce1d9SRob Herring (Arm) 6 avs Adaptive Voltage Scaling 30*ed4ce1d9SRob Herring (Arm) 7 sqf SPI 31*ed4ce1d9SRob Herring (Arm) 8 pwm PWM 32*ed4ce1d9SRob Herring (Arm) 9 i2c_2 I2C 2 33*ed4ce1d9SRob Herring (Arm) 10 i2c_1 I2C 1 34*ed4ce1d9SRob Herring (Arm) 11 ddr_phy DDR PHY 35*ed4ce1d9SRob Herring (Arm) 12 ddr_fclk DDR F clock 36*ed4ce1d9SRob Herring (Arm) 13 trace Trace 37*ed4ce1d9SRob Herring (Arm) 14 counter Counter 38*ed4ce1d9SRob Herring (Arm) 15 eip97 EIP 97 39*ed4ce1d9SRob Herring (Arm) 16 cpu CPU 40*ed4ce1d9SRob Herring (Arm) 41*ed4ce1d9SRob Herring (Arm) The following is a list of provided IDs for Armada 3700 South bridge clocks: 42*ed4ce1d9SRob Herring (Arm) 43*ed4ce1d9SRob Herring (Arm) ID Clock name Description 44*ed4ce1d9SRob Herring (Arm) ----------------------------------- 45*ed4ce1d9SRob Herring (Arm) 0 gbe-50 50 MHz parent clock for Gigabit Ethernet 46*ed4ce1d9SRob Herring (Arm) 1 gbe-core parent clock for Gigabit Ethernet core 47*ed4ce1d9SRob Herring (Arm) 2 gbe-125 125 MHz parent clock for Gigabit Ethernet 48*ed4ce1d9SRob Herring (Arm) 3 gbe1-50 50 MHz clock for Gigabit Ethernet port 1 49*ed4ce1d9SRob Herring (Arm) 4 gbe0-50 50 MHz clock for Gigabit Ethernet port 0 50*ed4ce1d9SRob Herring (Arm) 5 gbe1-125 125 MHz clock for Gigabit Ethernet port 1 51*ed4ce1d9SRob Herring (Arm) 6 gbe0-125 125 MHz clock for Gigabit Ethernet port 0 52*ed4ce1d9SRob Herring (Arm) 7 gbe1-core Gigabit Ethernet core port 1 53*ed4ce1d9SRob Herring (Arm) 8 gbe0-core Gigabit Ethernet core port 0 54*ed4ce1d9SRob Herring (Arm) 9 gbe-bm Gigabit Ethernet Buffer Manager 55*ed4ce1d9SRob Herring (Arm) 10 sdio SDIO 56*ed4ce1d9SRob Herring (Arm) 11 usb32-sub2-sys USB 2 clock 57*ed4ce1d9SRob Herring (Arm) 12 usb32-ss-sys USB 3 clock 58*ed4ce1d9SRob Herring (Arm) 13 pcie PCIe controller 59*ed4ce1d9SRob Herring (Arm) 60*ed4ce1d9SRob Herring (Arm)properties: 61*ed4ce1d9SRob Herring (Arm) compatible: 62*ed4ce1d9SRob Herring (Arm) oneOf: 63*ed4ce1d9SRob Herring (Arm) - const: marvell,armada-3700-periph-clock-sb 64*ed4ce1d9SRob Herring (Arm) - items: 65*ed4ce1d9SRob Herring (Arm) - const: marvell,armada-3700-periph-clock-nb 66*ed4ce1d9SRob Herring (Arm) - const: syscon 67*ed4ce1d9SRob Herring (Arm) reg: 68*ed4ce1d9SRob Herring (Arm) maxItems: 1 69*ed4ce1d9SRob Herring (Arm) 70*ed4ce1d9SRob Herring (Arm) clocks: 71*ed4ce1d9SRob Herring (Arm) items: 72*ed4ce1d9SRob Herring (Arm) - description: TBG-A P clock and specifier 73*ed4ce1d9SRob Herring (Arm) - description: TBG-B P clock and specifier 74*ed4ce1d9SRob Herring (Arm) - description: TBG-A S clock and specifier 75*ed4ce1d9SRob Herring (Arm) - description: TBG-B S clock and specifier 76*ed4ce1d9SRob Herring (Arm) - description: Xtal clock and specifier 77*ed4ce1d9SRob Herring (Arm) 78*ed4ce1d9SRob Herring (Arm) '#clock-cells': 79*ed4ce1d9SRob Herring (Arm) const: 1 80*ed4ce1d9SRob Herring (Arm) 81*ed4ce1d9SRob Herring (Arm)required: 82*ed4ce1d9SRob Herring (Arm) - compatible 83*ed4ce1d9SRob Herring (Arm) - reg 84*ed4ce1d9SRob Herring (Arm) - clocks 85*ed4ce1d9SRob Herring (Arm) - '#clock-cells' 86*ed4ce1d9SRob Herring (Arm) 87*ed4ce1d9SRob Herring (Arm)additionalProperties: false 88*ed4ce1d9SRob Herring (Arm) 89*ed4ce1d9SRob Herring (Arm)examples: 90*ed4ce1d9SRob Herring (Arm) - | 91*ed4ce1d9SRob Herring (Arm) clock-controller@13000{ 92*ed4ce1d9SRob Herring (Arm) compatible = "marvell,armada-3700-periph-clock-sb"; 93*ed4ce1d9SRob Herring (Arm) reg = <0x13000 0x1000>; 94*ed4ce1d9SRob Herring (Arm) clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>, <&tbg 3>, <&xtalclk>; 95*ed4ce1d9SRob Herring (Arm) #clock-cells = <1>; 96*ed4ce1d9SRob Herring (Arm) }; 97