1*bb214886SRob Herring (Arm)# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*bb214886SRob Herring (Arm)# Copyright 2025 LSI 3*bb214886SRob Herring (Arm)%YAML 1.2 4*bb214886SRob Herring (Arm)--- 5*bb214886SRob Herring (Arm)$id: http://devicetree.org/schemas/clock/lsi,axm5516-clks.yaml# 6*bb214886SRob Herring (Arm)$schema: http://devicetree.org/meta-schemas/core.yaml# 7*bb214886SRob Herring (Arm) 8*bb214886SRob Herring (Arm)title: LSI AXM5516 Clock Controller 9*bb214886SRob Herring (Arm) 10*bb214886SRob Herring (Arm)maintainers: 11*bb214886SRob Herring (Arm) - Anders Berg <anders.berg@lsi.com> 12*bb214886SRob Herring (Arm) 13*bb214886SRob Herring (Arm)description: 14*bb214886SRob Herring (Arm) See <dt-bindings/clock/lsi,axxia-clock.h> for the list of supported clock IDs. 15*bb214886SRob Herring (Arm) 16*bb214886SRob Herring (Arm)properties: 17*bb214886SRob Herring (Arm) compatible: 18*bb214886SRob Herring (Arm) const: lsi,axm5516-clks 19*bb214886SRob Herring (Arm) 20*bb214886SRob Herring (Arm) reg: 21*bb214886SRob Herring (Arm) maxItems: 1 22*bb214886SRob Herring (Arm) 23*bb214886SRob Herring (Arm) '#clock-cells': 24*bb214886SRob Herring (Arm) const: 1 25*bb214886SRob Herring (Arm) 26*bb214886SRob Herring (Arm)required: 27*bb214886SRob Herring (Arm) - compatible 28*bb214886SRob Herring (Arm) - reg 29*bb214886SRob Herring (Arm) - '#clock-cells' 30*bb214886SRob Herring (Arm) 31*bb214886SRob Herring (Arm)additionalProperties: false 32*bb214886SRob Herring (Arm) 33*bb214886SRob Herring (Arm)examples: 34*bb214886SRob Herring (Arm) - | 35*bb214886SRob Herring (Arm) bus { 36*bb214886SRob Herring (Arm) #address-cells = <2>; 37*bb214886SRob Herring (Arm) #size-cells = <1>; 38*bb214886SRob Herring (Arm) clock-controller@2010020000 { 39*bb214886SRob Herring (Arm) compatible = "lsi,axm5516-clks"; 40*bb214886SRob Herring (Arm) #clock-cells = <1>; 41*bb214886SRob Herring (Arm) reg = <0x20 0x10020000 0x20000>; 42*bb214886SRob Herring (Arm) }; 43*bb214886SRob Herring (Arm) }; 44