xref: /linux/Documentation/devicetree/bindings/clock/loongson,ls2k-clk.yaml (revision ae22a94997b8a03dcb3c922857c203246711f9d4) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/loongson,ls2k-clk.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Loongson-2 SoC Clock Control Module
8
9maintainers:
10  - Yinbo Zhu <zhuyinbo@loongson.cn>
11
12description: |
13  Loongson-2 SoC clock control module is an integrated clock controller, which
14  generates and supplies to all modules.
15
16properties:
17  compatible:
18    enum:
19      - loongson,ls2k-clk
20
21  reg:
22    maxItems: 1
23
24  clocks:
25    items:
26      - description: 100m ref
27
28  clock-names:
29    items:
30      - const: ref_100m
31
32  '#clock-cells':
33    const: 1
34    description:
35      The clock consumer should specify the desired clock by having the clock
36      ID in its "clocks" phandle cell. See include/dt-bindings/clock/loongson,ls2k-clk.h
37      for the full list of Loongson-2 SoC clock IDs.
38
39required:
40  - compatible
41  - reg
42  - clocks
43  - clock-names
44  - '#clock-cells'
45
46additionalProperties: false
47
48examples:
49  - |
50    ref_100m: clock-ref-100m {
51        compatible = "fixed-clock";
52        #clock-cells = <0>;
53        clock-frequency = <100000000>;
54        clock-output-names = "ref_100m";
55    };
56
57    clk: clock-controller@1fe00480 {
58        compatible = "loongson,ls2k-clk";
59        reg = <0x1fe00480 0x58>;
60        #clock-cells = <1>;
61        clocks = <&ref_100m>;
62        clock-names = "ref_100m";
63    };
64