xref: /linux/Documentation/devicetree/bindings/clock/imx8ulp-cgc-clock.yaml (revision da1d9caf95def6f0320819cf941c9fd1069ba9e1) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/imx8ulp-cgc-clock.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NXP i.MX8ULP Clock Generation & Control(CGC) Module Binding
8
9maintainers:
10  - Jacky Bai <ping.bai@nxp.com>
11
12description: |
13  On i.MX8ULP, The clock sources generation, distribution and management is
14  under the control of several CGCs & PCCs modules. The CGC modules generate
15  and distribute clocks on the device.
16
17properties:
18  compatible:
19    enum:
20      - fsl,imx8ulp-cgc1
21      - fsl,imx8ulp-cgc2
22
23  reg:
24    maxItems: 1
25
26  '#clock-cells':
27    const: 1
28
29required:
30  - compatible
31  - reg
32  - '#clock-cells'
33
34additionalProperties: false
35
36examples:
37  # Clock Generation & Control Module node:
38  - |
39    clock-controller@292c0000 {
40        compatible = "fsl,imx8ulp-cgc1";
41        reg = <0x292c0000 0x10000>;
42        #clock-cells = <1>;
43    };
44