xref: /linux/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml (revision 3d2ce675aba7e2425710e23268579a5d76c7e725) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/idt,versaclock5.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Binding for IDT VersaClock 5 and 6 programmable I2C clock generators
8
9description: |
10  The IDT VersaClock 5 and VersaClock 6 are programmable I2C
11  clock generators providing from 3 to 12 output clocks.
12
13  When referencing the provided clock in the DT using phandle and clock
14  specifier, the following mapping applies:
15
16  - 5P49V5923:
17    0 -- OUT0_SEL_I2CB
18    1 -- OUT1
19    2 -- OUT2
20
21  - 5P49V5933:
22    0 -- OUT0_SEL_I2CB
23    1 -- OUT1
24    2 -- OUT4
25
26  - other parts:
27    0 -- OUT0_SEL_I2CB
28    1 -- OUT1
29    2 -- OUT2
30    3 -- OUT3
31    4 -- OUT4
32
33maintainers:
34  - Luca Ceresoli <luca@lucaceresoli.net>
35
36properties:
37  compatible:
38    enum:
39      - idt,5p49v5923
40      - idt,5p49v5925
41      - idt,5p49v5933
42      - idt,5p49v5935
43      - idt,5p49v6901
44      - idt,5p49v6965
45
46  reg:
47    description: I2C device address
48    enum: [ 0x68, 0x6a ]
49
50  '#clock-cells':
51    const: 1
52
53  clock-names:
54    minItems: 1
55    maxItems: 2
56    items:
57      enum: [ xin, clkin ]
58  clocks:
59    minItems: 1
60    maxItems: 2
61
62  idt,xtal-load-femtofarads:
63    minimum: 9000
64    maximum: 22760
65    description: Optional load capacitor for XTAL1 and XTAL2
66
67patternProperties:
68  "^OUT[1-4]$":
69    type: object
70    description:
71      Description of one of the outputs (OUT1..OUT4). See "Clock1 Output
72      Configuration" in the Versaclock 5/6/6E Family Register Description
73      and Programming Guide.
74    properties:
75      idt,mode:
76        description:
77          The output drive mode. Values defined in dt-bindings/clk/versaclock.h
78        $ref: /schemas/types.yaml#/definitions/uint32
79        minimum: 0
80        maximum: 6
81      idt,voltage-microvolt:
82        description: The output drive voltage.
83        enum: [ 1800000, 2500000, 3300000 ]
84      idt,slew-percent:
85        description: The Slew rate control for CMOS single-ended.
86        enum: [ 80, 85, 90, 100 ]
87
88required:
89  - compatible
90  - reg
91  - '#clock-cells'
92
93allOf:
94  - if:
95      properties:
96        compatible:
97          enum:
98            - idt,5p49v5933
99            - idt,5p49v5935
100    then:
101      # Devices with builtin crystal + optional external input
102      properties:
103        clock-names:
104          const: clkin
105        clocks:
106          maxItems: 1
107    else:
108      # Devices without builtin crystal
109      required:
110        - clock-names
111        - clocks
112
113additionalProperties: false
114
115examples:
116  - |
117    #include <dt-bindings/clk/versaclock.h>
118
119    /* 25MHz reference crystal */
120    ref25: ref25m {
121        compatible = "fixed-clock";
122        #clock-cells = <0>;
123        clock-frequency = <25000000>;
124    };
125
126    i2c@0 {
127        reg = <0x0 0x100>;
128        #address-cells = <1>;
129        #size-cells = <0>;
130
131        /* IDT 5P49V5923 I2C clock generator */
132        vc5: clock-generator@6a {
133            compatible = "idt,5p49v5923";
134            reg = <0x6a>;
135            #clock-cells = <1>;
136
137            /* Connect XIN input to 25MHz reference */
138            clocks = <&ref25m>;
139            clock-names = "xin";
140
141            OUT1 {
142                idt,drive-mode = <VC5_CMOSD>;
143                idt,voltage-microvolts = <1800000>;
144                idt,slew-percent = <80>;
145            };
146
147            OUT4 {
148                idt,drive-mode = <VC5_LVDS>;
149            };
150        };
151    };
152
153    /* Consumer referencing the 5P49V5923 pin OUT1 */
154    consumer {
155        /* ... */
156        clocks = <&vc5 1>;
157        /* ... */
158    };
159
160...
161