1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/clock/google,gs101-clock.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Google GS101 SoC clock controller 8 9maintainers: 10 - Peter Griffin <peter.griffin@linaro.org> 11 12description: | 13 Google GS101 clock controller is comprised of several CMU units, generating 14 clocks for different domains. Those CMU units are modeled as separate device 15 tree nodes, and might depend on each other. The root clock in that clock tree 16 is OSCCLK (24.576 MHz). That external clock must be defined as a fixed-rate 17 clock in dts. 18 19 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and 20 dividers; all other leaf clocks (other CMUs) are usually derived from CMU_TOP. 21 22 Each clock is assigned an identifier and client nodes can use this identifier 23 to specify the clock which they consume. All clocks available for usage 24 in clock consumer nodes are defined as preprocessor macros in 25 'dt-bindings/clock/gs101.h' header. 26 27properties: 28 compatible: 29 enum: 30 - google,gs101-cmu-top 31 - google,gs101-cmu-apm 32 - google,gs101-cmu-misc 33 - google,gs101-cmu-hsi0 34 - google,gs101-cmu-hsi2 35 - google,gs101-cmu-peric0 36 - google,gs101-cmu-peric1 37 38 clocks: 39 minItems: 1 40 maxItems: 5 41 42 clock-names: 43 minItems: 1 44 maxItems: 5 45 46 "#clock-cells": 47 const: 1 48 49 power-domains: 50 maxItems: 1 51 52 reg: 53 maxItems: 1 54 55required: 56 - compatible 57 - "#clock-cells" 58 - clocks 59 - clock-names 60 - reg 61 62allOf: 63 - if: 64 properties: 65 compatible: 66 contains: 67 enum: 68 - google,gs101-cmu-top 69 - google,gs101-cmu-apm 70 then: 71 properties: 72 clocks: 73 items: 74 - description: External reference clock (24.576 MHz) 75 76 clock-names: 77 items: 78 - const: oscclk 79 80 - if: 81 properties: 82 compatible: 83 contains: 84 const: google,gs101-cmu-hsi0 85 86 then: 87 properties: 88 clocks: 89 items: 90 - description: External reference clock (24.576 MHz) 91 - description: HSI0 bus clock (from CMU_TOP) 92 - description: DPGTC (from CMU_TOP) 93 - description: USB DRD controller clock (from CMU_TOP) 94 - description: USB Display Port debug clock (from CMU_TOP) 95 96 clock-names: 97 items: 98 - const: oscclk 99 - const: bus 100 - const: dpgtc 101 - const: usb31drd 102 - const: usbdpdbg 103 104 - if: 105 properties: 106 compatible: 107 contains: 108 enum: 109 - google,gs101-cmu-hsi2 110 111 then: 112 properties: 113 clocks: 114 items: 115 - description: External reference clock (24.576 MHz) 116 - description: High Speed Interface bus clock (from CMU_TOP) 117 - description: High Speed Interface pcie clock (from CMU_TOP) 118 - description: High Speed Interface ufs clock (from CMU_TOP) 119 - description: High Speed Interface mmc clock (from CMU_TOP) 120 121 clock-names: 122 items: 123 - const: oscclk 124 - const: bus 125 - const: pcie 126 - const: ufs 127 - const: mmc 128 129 - if: 130 properties: 131 compatible: 132 contains: 133 const: google,gs101-cmu-misc 134 135 then: 136 properties: 137 clocks: 138 items: 139 - description: Misc bus clock (from CMU_TOP) 140 - description: Misc sss clock (from CMU_TOP) 141 142 clock-names: 143 items: 144 - const: bus 145 - const: sss 146 147 - if: 148 properties: 149 compatible: 150 contains: 151 enum: 152 - google,gs101-cmu-peric0 153 - google,gs101-cmu-peric1 154 155 then: 156 properties: 157 clocks: 158 items: 159 - description: External reference clock (24.576 MHz) 160 - description: Connectivity Peripheral 0/1 bus clock (from CMU_TOP) 161 - description: Connectivity Peripheral 0/1 IP clock (from CMU_TOP) 162 163 clock-names: 164 items: 165 - const: oscclk 166 - const: bus 167 - const: ip 168 169additionalProperties: false 170 171examples: 172 # Clock controller node for CMU_TOP 173 - | 174 #include <dt-bindings/clock/google,gs101.h> 175 176 cmu_top: clock-controller@1e080000 { 177 compatible = "google,gs101-cmu-top"; 178 reg = <0x1e080000 0x8000>; 179 #clock-cells = <1>; 180 clocks = <&ext_24_5m>; 181 clock-names = "oscclk"; 182 }; 183 184... 185