xref: /linux/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml (revision 38ef046544aad88de3b520f38fa3eed2c44dc0a8) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/google,gs101-clock.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Google GS101 SoC clock controller
8
9maintainers:
10  - Peter Griffin <peter.griffin@linaro.org>
11
12description: |
13  Google GS101 clock controller is comprised of several CMU units, generating
14  clocks for different domains. Those CMU units are modeled as separate device
15  tree nodes, and might depend on each other. The root clock in that clock tree
16  is OSCCLK (24.576 MHz). That external clock must be defined as a fixed-rate
17  clock in dts.
18
19  CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
20  dividers; all other leaf clocks (other CMUs) are usually derived from CMU_TOP.
21
22  Each clock is assigned an identifier and client nodes can use this identifier
23  to specify the clock which they consume. All clocks available for usage
24  in clock consumer nodes are defined as preprocessor macros in
25  'dt-bindings/clock/gs101.h' header.
26
27properties:
28  compatible:
29    enum:
30      - google,gs101-cmu-top
31      - google,gs101-cmu-apm
32      - google,gs101-cmu-dpu
33      - google,gs101-cmu-hsi0
34      - google,gs101-cmu-hsi2
35      - google,gs101-cmu-misc
36      - google,gs101-cmu-peric0
37      - google,gs101-cmu-peric1
38
39  clocks:
40    minItems: 1
41    maxItems: 5
42
43  clock-names:
44    minItems: 1
45    maxItems: 5
46
47  "#clock-cells":
48    const: 1
49
50  power-domains:
51    maxItems: 1
52
53  reg:
54    maxItems: 1
55
56required:
57  - compatible
58  - "#clock-cells"
59  - clocks
60  - clock-names
61  - reg
62
63allOf:
64  - if:
65      properties:
66        compatible:
67          contains:
68            enum:
69              - google,gs101-cmu-top
70              - google,gs101-cmu-apm
71    then:
72      properties:
73        clocks:
74          items:
75            - description: External reference clock (24.576 MHz)
76
77        clock-names:
78          items:
79            - const: oscclk
80
81  - if:
82      properties:
83        compatible:
84          contains:
85            const: google,gs101-cmu-dpu
86
87    then:
88      properties:
89        clocks:
90          items:
91            - description: External reference clock (24.576 MHz)
92            - description: DPU bus clock (from CMU_TOP)
93
94        clock-names:
95          items:
96            - const: oscclk
97            - const: bus
98
99  - if:
100      properties:
101        compatible:
102          contains:
103            const: google,gs101-cmu-hsi0
104
105    then:
106      properties:
107        clocks:
108          items:
109            - description: External reference clock (24.576 MHz)
110            - description: HSI0 bus clock (from CMU_TOP)
111            - description: DPGTC (from CMU_TOP)
112            - description: USB DRD controller clock (from CMU_TOP)
113            - description: USB Display Port debug clock (from CMU_TOP)
114
115        clock-names:
116          items:
117            - const: oscclk
118            - const: bus
119            - const: dpgtc
120            - const: usb31drd
121            - const: usbdpdbg
122
123  - if:
124      properties:
125        compatible:
126          contains:
127            enum:
128              - google,gs101-cmu-hsi2
129
130    then:
131      properties:
132        clocks:
133          items:
134            - description: External reference clock (24.576 MHz)
135            - description: High Speed Interface bus clock (from CMU_TOP)
136            - description: High Speed Interface pcie clock (from CMU_TOP)
137            - description: High Speed Interface ufs clock (from CMU_TOP)
138            - description: High Speed Interface mmc clock (from CMU_TOP)
139
140        clock-names:
141          items:
142            - const: oscclk
143            - const: bus
144            - const: pcie
145            - const: ufs
146            - const: mmc
147
148  - if:
149      properties:
150        compatible:
151          contains:
152            const: google,gs101-cmu-misc
153
154    then:
155      properties:
156        clocks:
157          items:
158            - description: Misc bus clock (from CMU_TOP)
159            - description: Misc sss clock (from CMU_TOP)
160
161        clock-names:
162          items:
163            - const: bus
164            - const: sss
165
166  - if:
167      properties:
168        compatible:
169          contains:
170            enum:
171              - google,gs101-cmu-peric0
172              - google,gs101-cmu-peric1
173
174    then:
175      properties:
176        clocks:
177          items:
178            - description: External reference clock (24.576 MHz)
179            - description: Connectivity Peripheral 0/1 bus clock (from CMU_TOP)
180            - description: Connectivity Peripheral 0/1 IP clock (from CMU_TOP)
181
182        clock-names:
183          items:
184            - const: oscclk
185            - const: bus
186            - const: ip
187
188additionalProperties: false
189
190examples:
191  # Clock controller node for CMU_TOP
192  - |
193    #include <dt-bindings/clock/google,gs101.h>
194
195    cmu_top: clock-controller@1e080000 {
196        compatible = "google,gs101-cmu-top";
197        reg = <0x1e080000 0x8000>;
198        #clock-cells = <1>;
199        clocks = <&ext_24_5m>;
200        clock-names = "oscclk";
201    };
202
203...
204