1*1ccdd04fSJassi BrarFujitsu CRG11 clock driver bindings 2*1ccdd04fSJassi Brar----------------------------------- 3*1ccdd04fSJassi Brar 4*1ccdd04fSJassi BrarRequired properties : 5*1ccdd04fSJassi Brar- compatible : Shall contain "fujitsu,mb86s70-crg11" 6*1ccdd04fSJassi Brar- #clock-cells : Shall be 3 {cntrlr domain port} 7*1ccdd04fSJassi Brar 8*1ccdd04fSJassi BrarThe consumer specifies the desired clock pointing to its phandle. 9*1ccdd04fSJassi Brar 10*1ccdd04fSJassi BrarExample: 11*1ccdd04fSJassi Brar 12*1ccdd04fSJassi Brar clock: crg11 { 13*1ccdd04fSJassi Brar compatible = "fujitsu,mb86s70-crg11"; 14*1ccdd04fSJassi Brar #clock-cells = <3>; 15*1ccdd04fSJassi Brar }; 16*1ccdd04fSJassi Brar 17*1ccdd04fSJassi Brar mhu: mhu0@2b1f0000 { 18*1ccdd04fSJassi Brar #mbox-cells = <1>; 19*1ccdd04fSJassi Brar compatible = "arm,mhu"; 20*1ccdd04fSJassi Brar reg = <0 0x2B1F0000 0x1000>; 21*1ccdd04fSJassi Brar interrupts = <0 36 4>, /* LP Non-Sec */ 22*1ccdd04fSJassi Brar <0 35 4>, /* HP Non-Sec */ 23*1ccdd04fSJassi Brar <0 37 4>; /* Secure */ 24*1ccdd04fSJassi Brar clocks = <&clock 0 2 1>; /* Cntrlr:0 Domain:2 Port:1 */ 25*1ccdd04fSJassi Brar clock-names = "clk"; 26*1ccdd04fSJassi Brar }; 27