1*44730eacSXukai Wang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*44730eacSXukai Wang%YAML 1.2 3*44730eacSXukai Wang--- 4*44730eacSXukai Wang$id: http://devicetree.org/schemas/clock/canaan,k230-clk.yaml# 5*44730eacSXukai Wang$schema: http://devicetree.org/meta-schemas/core.yaml# 6*44730eacSXukai Wang 7*44730eacSXukai Wangtitle: Canaan Kendryte K230 Clock 8*44730eacSXukai Wang 9*44730eacSXukai Wangmaintainers: 10*44730eacSXukai Wang - Xukai Wang <kingxukai@zohomail.com> 11*44730eacSXukai Wang 12*44730eacSXukai Wangdescription: 13*44730eacSXukai Wang The Canaan K230 clock controller generates various clocks for SoC 14*44730eacSXukai Wang peripherals. See include/dt-bindings/clock/canaan,k230-clk.h for 15*44730eacSXukai Wang valid clock IDs. 16*44730eacSXukai Wang 17*44730eacSXukai Wangproperties: 18*44730eacSXukai Wang compatible: 19*44730eacSXukai Wang const: canaan,k230-clk 20*44730eacSXukai Wang 21*44730eacSXukai Wang reg: 22*44730eacSXukai Wang items: 23*44730eacSXukai Wang - description: PLL control registers 24*44730eacSXukai Wang - description: Sysclk control registers 25*44730eacSXukai Wang 26*44730eacSXukai Wang clocks: 27*44730eacSXukai Wang items: 28*44730eacSXukai Wang - description: Main external reference clock 29*44730eacSXukai Wang - description: 30*44730eacSXukai Wang External clock which used as the pulse input 31*44730eacSXukai Wang for the timer to provide timing signals. 32*44730eacSXukai Wang 33*44730eacSXukai Wang clock-names: 34*44730eacSXukai Wang items: 35*44730eacSXukai Wang - const: osc24m 36*44730eacSXukai Wang - const: timer-pulse-in 37*44730eacSXukai Wang 38*44730eacSXukai Wang '#clock-cells': 39*44730eacSXukai Wang const: 1 40*44730eacSXukai Wang 41*44730eacSXukai Wangrequired: 42*44730eacSXukai Wang - compatible 43*44730eacSXukai Wang - reg 44*44730eacSXukai Wang - clocks 45*44730eacSXukai Wang - clock-names 46*44730eacSXukai Wang - '#clock-cells' 47*44730eacSXukai Wang 48*44730eacSXukai WangadditionalProperties: false 49*44730eacSXukai Wang 50*44730eacSXukai Wangexamples: 51*44730eacSXukai Wang - | 52*44730eacSXukai Wang clock-controller@91102000 { 53*44730eacSXukai Wang compatible = "canaan,k230-clk"; 54*44730eacSXukai Wang reg = <0x91102000 0x40>, 55*44730eacSXukai Wang <0x91100000 0x108>; 56*44730eacSXukai Wang clocks = <&osc24m>, <&timerx_pulse_in>; 57*44730eacSXukai Wang clock-names = "osc24m", "timer-pulse-in"; 58*44730eacSXukai Wang #clock-cells = <1>; 59*44730eacSXukai Wang }; 60