xref: /linux/Documentation/devicetree/bindings/clock/atmel,at91sam9x5-sckc.yaml (revision f9bff0e31881d03badf191d3b0005839391f5f2b) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/atmel,at91sam9x5-sckc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Atmel Slow Clock Controller (SCKC)
8
9maintainers:
10  - Claudiu Beznea <claudiu.beznea@microchip.com>
11
12properties:
13  compatible:
14    oneOf:
15      - enum:
16          - atmel,at91sam9x5-sckc
17          - atmel,sama5d3-sckc
18          - atmel,sama5d4-sckc
19          - microchip,sam9x60-sckc
20      - items:
21          - const: microchip,sama7g5-sckc
22          - const: microchip,sam9x60-sckc
23
24  reg:
25    maxItems: 1
26
27  clocks:
28    maxItems: 1
29
30  "#clock-cells":
31    enum: [0, 1]
32
33  atmel,osc-bypass:
34    type: boolean
35    description: set when a clock signal is directly provided on XIN
36
37required:
38  - compatible
39  - reg
40  - clocks
41  - "#clock-cells"
42
43allOf:
44  - if:
45      properties:
46        compatible:
47          contains:
48            enum:
49              - microchip,sam9x60-sckc
50    then:
51      properties:
52        "#clock-cells":
53          const: 1
54    else:
55      properties:
56        "#clock-cells":
57          const: 0
58
59additionalProperties: false
60
61examples:
62  - |
63    clk32k: clock-controller@fffffe50 {
64        compatible = "microchip,sam9x60-sckc";
65        reg = <0xfffffe50 0x4>;
66        clocks = <&slow_xtal>;
67        #clock-cells = <1>;
68    };
69
70...
71