1*9a7b0101SClaudiu Beznea# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*9a7b0101SClaudiu Beznea%YAML 1.2 3*9a7b0101SClaudiu Beznea--- 4*9a7b0101SClaudiu Beznea$id: http://devicetree.org/schemas/clock/atmel,at91sam9x5-sckc.yaml# 5*9a7b0101SClaudiu Beznea$schema: http://devicetree.org/meta-schemas/core.yaml# 6*9a7b0101SClaudiu Beznea 7*9a7b0101SClaudiu Bezneatitle: Atmel Slow Clock Controller (SCKC) 8*9a7b0101SClaudiu Beznea 9*9a7b0101SClaudiu Bezneamaintainers: 10*9a7b0101SClaudiu Beznea - Claudiu Beznea <claudiu.beznea@microchip.com> 11*9a7b0101SClaudiu Beznea 12*9a7b0101SClaudiu Bezneaproperties: 13*9a7b0101SClaudiu Beznea compatible: 14*9a7b0101SClaudiu Beznea oneOf: 15*9a7b0101SClaudiu Beznea - enum: 16*9a7b0101SClaudiu Beznea - atmel,at91sam9x5-sckc 17*9a7b0101SClaudiu Beznea - atmel,sama5d3-sckc 18*9a7b0101SClaudiu Beznea - atmel,sama5d4-sckc 19*9a7b0101SClaudiu Beznea - microchip,sam9x60-sckc 20*9a7b0101SClaudiu Beznea - items: 21*9a7b0101SClaudiu Beznea - const: microchip,sama7g5-sckc 22*9a7b0101SClaudiu Beznea - const: microchip,sam9x60-sckc 23*9a7b0101SClaudiu Beznea 24*9a7b0101SClaudiu Beznea reg: 25*9a7b0101SClaudiu Beznea maxItems: 1 26*9a7b0101SClaudiu Beznea 27*9a7b0101SClaudiu Beznea clocks: 28*9a7b0101SClaudiu Beznea maxItems: 1 29*9a7b0101SClaudiu Beznea 30*9a7b0101SClaudiu Beznea "#clock-cells": 31*9a7b0101SClaudiu Beznea enum: [0, 1] 32*9a7b0101SClaudiu Beznea 33*9a7b0101SClaudiu Beznea atmel,osc-bypass: 34*9a7b0101SClaudiu Beznea type: boolean 35*9a7b0101SClaudiu Beznea description: set when a clock signal is directly provided on XIN 36*9a7b0101SClaudiu Beznea 37*9a7b0101SClaudiu Beznearequired: 38*9a7b0101SClaudiu Beznea - compatible 39*9a7b0101SClaudiu Beznea - reg 40*9a7b0101SClaudiu Beznea - clocks 41*9a7b0101SClaudiu Beznea - "#clock-cells" 42*9a7b0101SClaudiu Beznea 43*9a7b0101SClaudiu BezneaallOf: 44*9a7b0101SClaudiu Beznea - if: 45*9a7b0101SClaudiu Beznea properties: 46*9a7b0101SClaudiu Beznea compatible: 47*9a7b0101SClaudiu Beznea contains: 48*9a7b0101SClaudiu Beznea enum: 49*9a7b0101SClaudiu Beznea - microchip,sam9x60-sckc 50*9a7b0101SClaudiu Beznea then: 51*9a7b0101SClaudiu Beznea properties: 52*9a7b0101SClaudiu Beznea "#clock-cells": 53*9a7b0101SClaudiu Beznea const: 1 54*9a7b0101SClaudiu Beznea else: 55*9a7b0101SClaudiu Beznea properties: 56*9a7b0101SClaudiu Beznea "#clock-cells": 57*9a7b0101SClaudiu Beznea const: 0 58*9a7b0101SClaudiu Beznea 59*9a7b0101SClaudiu BezneaadditionalProperties: false 60*9a7b0101SClaudiu Beznea 61*9a7b0101SClaudiu Bezneaexamples: 62*9a7b0101SClaudiu Beznea - | 63*9a7b0101SClaudiu Beznea clk32k: clock-controller@fffffe50 { 64*9a7b0101SClaudiu Beznea compatible = "microchip,sam9x60-sckc"; 65*9a7b0101SClaudiu Beznea reg = <0xfffffe50 0x4>; 66*9a7b0101SClaudiu Beznea clocks = <&slow_xtal>; 67*9a7b0101SClaudiu Beznea #clock-cells = <1>; 68*9a7b0101SClaudiu Beznea }; 69*9a7b0101SClaudiu Beznea 70*9a7b0101SClaudiu Beznea... 71