xref: /linux/Documentation/devicetree/bindings/clock/amlogic,meson8-ddr-clkc.yaml (revision be239684b18e1cdcafcf8c7face4a2f562c745ad) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/amlogic,meson8-ddr-clkc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Amlogic DDR Clock Controller
8
9maintainers:
10  - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
11
12properties:
13  compatible:
14    enum:
15      - amlogic,meson8-ddr-clkc
16      - amlogic,meson8b-ddr-clkc
17
18  reg:
19    maxItems: 1
20
21  clocks:
22    maxItems: 1
23
24  clock-names:
25    items:
26      - const: xtal
27
28  "#clock-cells":
29    const: 1
30
31required:
32  - compatible
33  - reg
34  - clocks
35  - clock-names
36  - "#clock-cells"
37
38additionalProperties: false
39
40examples:
41  - |
42    ddr_clkc: clock-controller@400 {
43      compatible = "amlogic,meson8-ddr-clkc";
44      reg = <0x400 0x20>;
45      clocks = <&xtal>;
46      clock-names = "xtal";
47      #clock-cells = <1>;
48    };
49
50...
51