xref: /linux/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-tcon-ch0-clk.yaml (revision a4eb44a6435d6d8f9e642407a4a06f65eb90ca04) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-tcon-ch0-clk.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner A10 TCON Channel 0 Clock Device Tree Bindings
8
9maintainers:
10  - Chen-Yu Tsai <wens@csie.org>
11  - Maxime Ripard <mripard@kernel.org>
12
13deprecated: true
14
15properties:
16  "#clock-cells":
17    const: 0
18
19  "#reset-cells":
20    const: 1
21
22  compatible:
23    enum:
24      - allwinner,sun4i-a10-tcon-ch0-clk
25      - allwinner,sun4i-a10-tcon-ch1-clk
26
27  reg:
28    maxItems: 1
29
30  clocks:
31    maxItems: 4
32    description: >
33      The parent order must match the hardware programming order.
34
35  clock-output-names:
36    maxItems: 1
37
38required:
39  - "#clock-cells"
40  - compatible
41  - reg
42  - clocks
43  - clock-output-names
44
45if:
46  properties:
47    compatible:
48      contains:
49        const: allwinner,sun4i-a10-tcon-ch0-clk
50
51then:
52  required:
53    - "#reset-cells"
54
55additionalProperties: false
56
57examples:
58  - |
59    clk@1c20118 {
60        #clock-cells = <0>;
61        #reset-cells = <1>;
62        compatible = "allwinner,sun4i-a10-tcon-ch0-clk";
63        reg = <0x01c20118 0x4>;
64        clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
65        clock-output-names = "tcon-ch0-sclk";
66    };
67
68  - |
69    clk@1c2012c {
70        #clock-cells = <0>;
71        compatible = "allwinner,sun4i-a10-tcon-ch1-clk";
72        reg = <0x01c2012c 0x4>;
73        clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
74        clock-output-names = "tcon-ch1-sclk";
75    };
76
77...
78