1f95cad74SMaxime Ripard# SPDX-License-Identifier: GPL-2.0 2f95cad74SMaxime Ripard%YAML 1.2 3f95cad74SMaxime Ripard--- 4f95cad74SMaxime Ripard$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mod0-clk.yaml# 5f95cad74SMaxime Ripard$schema: http://devicetree.org/meta-schemas/core.yaml# 6f95cad74SMaxime Ripard 7*dd3cb467SAndrew Lunntitle: Allwinner A10 Module 0 Clock 8f95cad74SMaxime Ripard 9f95cad74SMaxime Ripardmaintainers: 10f95cad74SMaxime Ripard - Chen-Yu Tsai <wens@csie.org> 11f95cad74SMaxime Ripard - Maxime Ripard <mripard@kernel.org> 12f95cad74SMaxime Ripard 13f95cad74SMaxime Riparddeprecated: true 14f95cad74SMaxime Ripard 15f95cad74SMaxime Ripardselect: 16f95cad74SMaxime Ripard properties: 17f95cad74SMaxime Ripard compatible: 18f95cad74SMaxime Ripard contains: 19f95cad74SMaxime Ripard enum: 20f95cad74SMaxime Ripard - allwinner,sun4i-a10-mod0-clk 21f95cad74SMaxime Ripard - allwinner,sun9i-a80-mod0-clk 22f95cad74SMaxime Ripard 23f95cad74SMaxime Ripard # The PRCM on the A31 and A23 will have the reg property missing, 24f95cad74SMaxime Ripard # since it's set at the upper level node, and will be validated by 25f95cad74SMaxime Ripard # PRCM's schema. Make sure we only validate standalone nodes. 26f95cad74SMaxime Ripard required: 27f95cad74SMaxime Ripard - compatible 28f95cad74SMaxime Ripard - reg 29f95cad74SMaxime Ripard 30f95cad74SMaxime Ripardproperties: 31f95cad74SMaxime Ripard "#clock-cells": 32f95cad74SMaxime Ripard const: 0 33f95cad74SMaxime Ripard 34f95cad74SMaxime Ripard compatible: 35f95cad74SMaxime Ripard enum: 36f95cad74SMaxime Ripard - allwinner,sun4i-a10-mod0-clk 37f95cad74SMaxime Ripard - allwinner,sun9i-a80-mod0-clk 38f95cad74SMaxime Ripard 39f95cad74SMaxime Ripard reg: 40f95cad74SMaxime Ripard maxItems: 1 41f95cad74SMaxime Ripard 42f95cad74SMaxime Ripard clocks: 43f95cad74SMaxime Ripard # On the A80, the PRCM mod0 clocks have 2 parents. 44f95cad74SMaxime Ripard minItems: 2 45f95cad74SMaxime Ripard maxItems: 3 46f95cad74SMaxime Ripard description: > 47f95cad74SMaxime Ripard The parent order must match the hardware programming order. 48f95cad74SMaxime Ripard 49f95cad74SMaxime Ripard clock-output-names: 50f95cad74SMaxime Ripard maxItems: 1 51f95cad74SMaxime Ripard 52f95cad74SMaxime Ripardrequired: 53f95cad74SMaxime Ripard - "#clock-cells" 54f95cad74SMaxime Ripard - compatible 55f95cad74SMaxime Ripard - reg 56f95cad74SMaxime Ripard - clocks 57f95cad74SMaxime Ripard - clock-output-names 58f95cad74SMaxime Ripard 59f95cad74SMaxime RipardadditionalProperties: false 60f95cad74SMaxime Ripard 61f95cad74SMaxime Ripardexamples: 62f95cad74SMaxime Ripard - | 63f95cad74SMaxime Ripard clk@1c20080 { 64f95cad74SMaxime Ripard #clock-cells = <0>; 65f95cad74SMaxime Ripard compatible = "allwinner,sun4i-a10-mod0-clk"; 66f95cad74SMaxime Ripard reg = <0x01c20080 0x4>; 67f95cad74SMaxime Ripard clocks = <&osc24M>, <&pll6 1>, <&pll5 1>; 68f95cad74SMaxime Ripard clock-output-names = "nand"; 69f95cad74SMaxime Ripard }; 70f95cad74SMaxime Ripard 71f95cad74SMaxime Ripard - | 72f95cad74SMaxime Ripard clk@8001454 { 73f95cad74SMaxime Ripard #clock-cells = <0>; 74f95cad74SMaxime Ripard compatible = "allwinner,sun4i-a10-mod0-clk"; 75f95cad74SMaxime Ripard reg = <0x08001454 0x4>; 76f95cad74SMaxime Ripard clocks = <&osc32k>, <&osc24M>; 77f95cad74SMaxime Ripard clock-output-names = "r_ir"; 78f95cad74SMaxime Ripard }; 79f95cad74SMaxime Ripard 80f95cad74SMaxime Ripard... 81