1# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/cache/qcom,llcc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Last Level Cache Controller 8 9maintainers: 10 - Bjorn Andersson <andersson@kernel.org> 11 12description: | 13 LLCC (Last Level Cache Controller) provides last level of cache memory in SoC, 14 that can be shared by multiple clients. Clients here are different cores in the 15 SoC, the idea is to minimize the local caches at the clients and migrate to 16 common pool of memory. Cache memory is divided into partitions called slices 17 which are assigned to clients. Clients can query the slice details, activate 18 and deactivate them. 19 20properties: 21 compatible: 22 enum: 23 - qcom,qcs615-llcc 24 - qcom,qcs8300-llcc 25 - qcom,qdu1000-llcc 26 - qcom,sa8775p-llcc 27 - qcom,sar1130p-llcc 28 - qcom,sar2130p-llcc 29 - qcom,sc7180-llcc 30 - qcom,sc7280-llcc 31 - qcom,sc8180x-llcc 32 - qcom,sc8280xp-llcc 33 - qcom,sdm845-llcc 34 - qcom,sm6350-llcc 35 - qcom,sm7150-llcc 36 - qcom,sm8150-llcc 37 - qcom,sm8250-llcc 38 - qcom,sm8350-llcc 39 - qcom,sm8450-llcc 40 - qcom,sm8550-llcc 41 - qcom,sm8650-llcc 42 - qcom,x1e80100-llcc 43 44 reg: 45 minItems: 2 46 maxItems: 10 47 48 reg-names: 49 minItems: 2 50 maxItems: 10 51 52 interrupts: 53 maxItems: 1 54 55 nvmem-cells: 56 items: 57 - description: Reference to an nvmem node for multi channel DDR 58 59 nvmem-cell-names: 60 items: 61 - const: multi-chan-ddr 62 63required: 64 - compatible 65 - reg 66 - reg-names 67 68allOf: 69 - if: 70 properties: 71 compatible: 72 contains: 73 enum: 74 - qcom,sar1130p-llcc 75 - qcom,sar2130p-llcc 76 then: 77 properties: 78 reg: 79 items: 80 - description: LLCC0 base register region 81 - description: LLCC1 base register region 82 - description: LLCC broadcast OR register region 83 - description: LLCC broadcast AND register region 84 - description: LLCC scratchpad broadcast OR register region 85 - description: LLCC scratchpad broadcast AND register region 86 reg-names: 87 items: 88 - const: llcc0_base 89 - const: llcc1_base 90 - const: llcc_broadcast_base 91 - const: llcc_broadcast_and_base 92 - const: llcc_scratchpad_broadcast_base 93 - const: llcc_scratchpad_broadcast_and_base 94 95 - if: 96 properties: 97 compatible: 98 contains: 99 enum: 100 - qcom,qcs615-llcc 101 - qcom,sc7180-llcc 102 - qcom,sm6350-llcc 103 then: 104 properties: 105 reg: 106 items: 107 - description: LLCC0 base register region 108 - description: LLCC broadcast base register region 109 reg-names: 110 items: 111 - const: llcc0_base 112 - const: llcc_broadcast_base 113 114 - if: 115 properties: 116 compatible: 117 contains: 118 enum: 119 - qcom,sa8775p-llcc 120 then: 121 properties: 122 reg: 123 items: 124 - description: LLCC0 base register region 125 - description: LLCC1 base register region 126 - description: LLCC2 base register region 127 - description: LLCC3 base register region 128 - description: LLCC4 base register region 129 - description: LLCC5 base register region 130 - description: LLCC broadcast base register region 131 reg-names: 132 items: 133 - const: llcc0_base 134 - const: llcc1_base 135 - const: llcc2_base 136 - const: llcc3_base 137 - const: llcc4_base 138 - const: llcc5_base 139 - const: llcc_broadcast_base 140 141 - if: 142 properties: 143 compatible: 144 contains: 145 enum: 146 - qcom,sc7280-llcc 147 then: 148 properties: 149 reg: 150 items: 151 - description: LLCC0 base register region 152 - description: LLCC1 base register region 153 - description: LLCC broadcast base register region 154 reg-names: 155 items: 156 - const: llcc0_base 157 - const: llcc1_base 158 - const: llcc_broadcast_base 159 160 - if: 161 properties: 162 compatible: 163 contains: 164 enum: 165 - qcom,qdu1000-llcc 166 - qcom,sc8180x-llcc 167 - qcom,sc8280xp-llcc 168 then: 169 properties: 170 reg: 171 items: 172 - description: LLCC0 base register region 173 - description: LLCC1 base register region 174 - description: LLCC2 base register region 175 - description: LLCC3 base register region 176 - description: LLCC4 base register region 177 - description: LLCC5 base register region 178 - description: LLCC6 base register region 179 - description: LLCC7 base register region 180 - description: LLCC broadcast base register region 181 reg-names: 182 items: 183 - const: llcc0_base 184 - const: llcc1_base 185 - const: llcc2_base 186 - const: llcc3_base 187 - const: llcc4_base 188 - const: llcc5_base 189 - const: llcc6_base 190 - const: llcc7_base 191 - const: llcc_broadcast_base 192 193 - if: 194 properties: 195 compatible: 196 contains: 197 enum: 198 - qcom,x1e80100-llcc 199 then: 200 properties: 201 reg: 202 items: 203 - description: LLCC0 base register region 204 - description: LLCC1 base register region 205 - description: LLCC2 base register region 206 - description: LLCC3 base register region 207 - description: LLCC4 base register region 208 - description: LLCC5 base register region 209 - description: LLCC6 base register region 210 - description: LLCC7 base register region 211 - description: LLCC broadcast base register region 212 - description: LLCC broadcast AND register region 213 reg-names: 214 items: 215 - const: llcc0_base 216 - const: llcc1_base 217 - const: llcc2_base 218 - const: llcc3_base 219 - const: llcc4_base 220 - const: llcc5_base 221 - const: llcc6_base 222 - const: llcc7_base 223 - const: llcc_broadcast_base 224 - const: llcc_broadcast_and_base 225 226 - if: 227 properties: 228 compatible: 229 contains: 230 enum: 231 - qcom,qcs8300-llcc 232 - qcom,sdm845-llcc 233 - qcom,sm8150-llcc 234 - qcom,sm8250-llcc 235 - qcom,sm8350-llcc 236 then: 237 properties: 238 reg: 239 items: 240 - description: LLCC0 base register region 241 - description: LLCC1 base register region 242 - description: LLCC2 base register region 243 - description: LLCC3 base register region 244 - description: LLCC broadcast base register region 245 reg-names: 246 items: 247 - const: llcc0_base 248 - const: llcc1_base 249 - const: llcc2_base 250 - const: llcc3_base 251 - const: llcc_broadcast_base 252 253 - if: 254 properties: 255 compatible: 256 contains: 257 enum: 258 - qcom,sm8450-llcc 259 - qcom,sm8550-llcc 260 - qcom,sm8650-llcc 261 then: 262 properties: 263 reg: 264 items: 265 - description: LLCC0 base register region 266 - description: LLCC1 base register region 267 - description: LLCC2 base register region 268 - description: LLCC3 base register region 269 - description: LLCC broadcast OR register region 270 - description: LLCC broadcast AND register region 271 reg-names: 272 items: 273 - const: llcc0_base 274 - const: llcc1_base 275 - const: llcc2_base 276 - const: llcc3_base 277 - const: llcc_broadcast_base 278 - const: llcc_broadcast_and_base 279 280additionalProperties: false 281 282examples: 283 - | 284 #include <dt-bindings/interrupt-controller/arm-gic.h> 285 286 soc { 287 #address-cells = <2>; 288 #size-cells = <2>; 289 290 system-cache-controller@1100000 { 291 compatible = "qcom,sdm845-llcc"; 292 reg = <0 0x01100000 0 0x50000>, <0 0x01180000 0 0x50000>, 293 <0 0x01200000 0 0x50000>, <0 0x01280000 0 0x50000>, 294 <0 0x01300000 0 0x50000>; 295 reg-names = "llcc0_base", "llcc1_base", "llcc2_base", 296 "llcc3_base", "llcc_broadcast_base"; 297 interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; 298 }; 299 }; 300