xref: /linux/Documentation/devicetree/bindings/bus/fsl,imx8mp-aipstz.yaml (revision 115e74a29b530d121891238e9551c4bcdf7b04b5)
1*fdb5a1cbSLaurentiu Mihalcea# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*fdb5a1cbSLaurentiu Mihalcea%YAML 1.2
3*fdb5a1cbSLaurentiu Mihalcea---
4*fdb5a1cbSLaurentiu Mihalcea$id: http://devicetree.org/schemas/bus/fsl,imx8mp-aipstz.yaml#
5*fdb5a1cbSLaurentiu Mihalcea$schema: http://devicetree.org/meta-schemas/core.yaml#
6*fdb5a1cbSLaurentiu Mihalcea
7*fdb5a1cbSLaurentiu Mihalceatitle: Secure AHB to IP Slave bus (AIPSTZ) bridge
8*fdb5a1cbSLaurentiu Mihalcea
9*fdb5a1cbSLaurentiu Mihalceadescription:
10*fdb5a1cbSLaurentiu Mihalcea  The secure AIPS bridge (AIPSTZ) acts as a bridge for AHB masters issuing
11*fdb5a1cbSLaurentiu Mihalcea  transactions to IP Slave peripherals. Additionally, this module offers access
12*fdb5a1cbSLaurentiu Mihalcea  control configurations meant to restrict which peripherals a master can
13*fdb5a1cbSLaurentiu Mihalcea  access.
14*fdb5a1cbSLaurentiu Mihalcea
15*fdb5a1cbSLaurentiu Mihalceamaintainers:
16*fdb5a1cbSLaurentiu Mihalcea  - Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
17*fdb5a1cbSLaurentiu Mihalcea
18*fdb5a1cbSLaurentiu Mihalceaproperties:
19*fdb5a1cbSLaurentiu Mihalcea  compatible:
20*fdb5a1cbSLaurentiu Mihalcea    const: fsl,imx8mp-aipstz
21*fdb5a1cbSLaurentiu Mihalcea
22*fdb5a1cbSLaurentiu Mihalcea  reg:
23*fdb5a1cbSLaurentiu Mihalcea    maxItems: 1
24*fdb5a1cbSLaurentiu Mihalcea
25*fdb5a1cbSLaurentiu Mihalcea  power-domains:
26*fdb5a1cbSLaurentiu Mihalcea    maxItems: 1
27*fdb5a1cbSLaurentiu Mihalcea
28*fdb5a1cbSLaurentiu Mihalcea  "#address-cells":
29*fdb5a1cbSLaurentiu Mihalcea    const: 1
30*fdb5a1cbSLaurentiu Mihalcea
31*fdb5a1cbSLaurentiu Mihalcea  "#size-cells":
32*fdb5a1cbSLaurentiu Mihalcea    const: 1
33*fdb5a1cbSLaurentiu Mihalcea
34*fdb5a1cbSLaurentiu Mihalcea  "#access-controller-cells":
35*fdb5a1cbSLaurentiu Mihalcea    const: 3
36*fdb5a1cbSLaurentiu Mihalcea    description:
37*fdb5a1cbSLaurentiu Mihalcea      First cell - consumer ID
38*fdb5a1cbSLaurentiu Mihalcea      Second cell - consumer type (master or peripheral)
39*fdb5a1cbSLaurentiu Mihalcea      Third cell - configuration value
40*fdb5a1cbSLaurentiu Mihalcea
41*fdb5a1cbSLaurentiu Mihalcea  ranges: true
42*fdb5a1cbSLaurentiu Mihalcea
43*fdb5a1cbSLaurentiu Mihalcea# borrowed from simple-bus.yaml, no additional requirements for children
44*fdb5a1cbSLaurentiu MihalceapatternProperties:
45*fdb5a1cbSLaurentiu Mihalcea  "@(0|[1-9a-f][0-9a-f]*)$":
46*fdb5a1cbSLaurentiu Mihalcea    type: object
47*fdb5a1cbSLaurentiu Mihalcea    additionalProperties: true
48*fdb5a1cbSLaurentiu Mihalcea    properties:
49*fdb5a1cbSLaurentiu Mihalcea      reg:
50*fdb5a1cbSLaurentiu Mihalcea        items:
51*fdb5a1cbSLaurentiu Mihalcea          minItems: 2
52*fdb5a1cbSLaurentiu Mihalcea          maxItems: 4
53*fdb5a1cbSLaurentiu Mihalcea        minItems: 1
54*fdb5a1cbSLaurentiu Mihalcea        maxItems: 1024
55*fdb5a1cbSLaurentiu Mihalcea      ranges:
56*fdb5a1cbSLaurentiu Mihalcea        oneOf:
57*fdb5a1cbSLaurentiu Mihalcea          - items:
58*fdb5a1cbSLaurentiu Mihalcea              minItems: 3
59*fdb5a1cbSLaurentiu Mihalcea              maxItems: 7
60*fdb5a1cbSLaurentiu Mihalcea            minItems: 1
61*fdb5a1cbSLaurentiu Mihalcea            maxItems: 1024
62*fdb5a1cbSLaurentiu Mihalcea          - $ref: /schemas/types.yaml#/definitions/flag
63*fdb5a1cbSLaurentiu Mihalcea    anyOf:
64*fdb5a1cbSLaurentiu Mihalcea      - required:
65*fdb5a1cbSLaurentiu Mihalcea          - reg
66*fdb5a1cbSLaurentiu Mihalcea      - required:
67*fdb5a1cbSLaurentiu Mihalcea          - ranges
68*fdb5a1cbSLaurentiu Mihalcea
69*fdb5a1cbSLaurentiu Mihalcearequired:
70*fdb5a1cbSLaurentiu Mihalcea  - compatible
71*fdb5a1cbSLaurentiu Mihalcea  - reg
72*fdb5a1cbSLaurentiu Mihalcea  - power-domains
73*fdb5a1cbSLaurentiu Mihalcea  - "#address-cells"
74*fdb5a1cbSLaurentiu Mihalcea  - "#size-cells"
75*fdb5a1cbSLaurentiu Mihalcea  - "#access-controller-cells"
76*fdb5a1cbSLaurentiu Mihalcea  - ranges
77*fdb5a1cbSLaurentiu Mihalcea
78*fdb5a1cbSLaurentiu MihalceaadditionalProperties: false
79*fdb5a1cbSLaurentiu Mihalcea
80*fdb5a1cbSLaurentiu Mihalceaexamples:
81*fdb5a1cbSLaurentiu Mihalcea  - |
82*fdb5a1cbSLaurentiu Mihalcea    #include <dt-bindings/clock/imx8mp-clock.h>
83*fdb5a1cbSLaurentiu Mihalcea    #include <dt-bindings/interrupt-controller/arm-gic.h>
84*fdb5a1cbSLaurentiu Mihalcea
85*fdb5a1cbSLaurentiu Mihalcea    bus@30df0000 {
86*fdb5a1cbSLaurentiu Mihalcea        compatible = "fsl,imx8mp-aipstz";
87*fdb5a1cbSLaurentiu Mihalcea        reg = <0x30df0000 0x10000>;
88*fdb5a1cbSLaurentiu Mihalcea        ranges = <0x30c00000 0x30c00000 0x400000>;
89*fdb5a1cbSLaurentiu Mihalcea        power-domains = <&pgc_audio>;
90*fdb5a1cbSLaurentiu Mihalcea        #address-cells = <1>;
91*fdb5a1cbSLaurentiu Mihalcea        #size-cells = <1>;
92*fdb5a1cbSLaurentiu Mihalcea        #access-controller-cells = <3>;
93*fdb5a1cbSLaurentiu Mihalcea
94*fdb5a1cbSLaurentiu Mihalcea        dma-controller@30e00000 {
95*fdb5a1cbSLaurentiu Mihalcea            compatible = "fsl,imx8mp-sdma", "fsl,imx8mq-sdma";
96*fdb5a1cbSLaurentiu Mihalcea            reg = <0x30e00000 0x10000>;
97*fdb5a1cbSLaurentiu Mihalcea            #dma-cells = <3>;
98*fdb5a1cbSLaurentiu Mihalcea            clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SDMA3_ROOT>,
99*fdb5a1cbSLaurentiu Mihalcea                     <&clk IMX8MP_CLK_AUDIO_ROOT>;
100*fdb5a1cbSLaurentiu Mihalcea            clock-names = "ipg", "ahb";
101*fdb5a1cbSLaurentiu Mihalcea            interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
102*fdb5a1cbSLaurentiu Mihalcea            fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
103*fdb5a1cbSLaurentiu Mihalcea        };
104*fdb5a1cbSLaurentiu Mihalcea    };
105