xref: /linux/Documentation/devicetree/bindings/ata/ahci-platform.yaml (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/ata/ahci-platform.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: AHCI SATA Controller
8
9description: |
10  SATA nodes are defined to describe on-chip Serial ATA controllers.
11  Each SATA controller should have its own node.
12
13  It is possible, but not required, to represent each port as a sub-node.
14  It allows to enable each port independently when dealing with multiple
15  PHYs.
16
17maintainers:
18  - Hans de Goede <hdegoede@redhat.com>
19  - Jens Axboe <axboe@kernel.dk>
20
21select:
22  properties:
23    compatible:
24      contains:
25        enum:
26          - brcm,iproc-ahci
27          - cavium,octeon-7130-ahci
28          - hisilicon,hisi-ahci
29          - ibm,476gtr-ahci
30          - marvell,armada-3700-ahci
31          - marvell,armada-8k-ahci
32          - marvell,berlin2q-ahci
33          - qcom,apq8064-ahci
34          - qcom,ipq806x-ahci
35          - socionext,uniphier-pro4-ahci
36          - socionext,uniphier-pxs2-ahci
37          - socionext,uniphier-pxs3-ahci
38  required:
39    - compatible
40
41properties:
42  compatible:
43    oneOf:
44      - items:
45          - enum:
46              - brcm,iproc-ahci
47              - marvell,armada-8k-ahci
48              - marvell,berlin2-ahci
49              - marvell,berlin2q-ahci
50              - qcom,apq8064-ahci
51              - qcom,ipq806x-ahci
52              - socionext,uniphier-pro4-ahci
53              - socionext,uniphier-pxs2-ahci
54              - socionext,uniphier-pxs3-ahci
55          - const: generic-ahci
56      - enum:
57          - cavium,octeon-7130-ahci
58          - hisilicon,hisi-ahci
59          - ibm,476gtr-ahci
60          - marvell,armada-3700-ahci
61
62  reg:
63    minItems: 1
64    maxItems: 2
65
66  reg-names:
67    maxItems: 1
68
69  clocks:
70    minItems: 1
71    maxItems: 5
72
73  clock-names:
74    minItems: 1
75    maxItems: 5
76
77  interrupts:
78    maxItems: 1
79
80  power-domains:
81    maxItems: 1
82
83  resets:
84    minItems: 1
85    maxItems: 3
86
87patternProperties:
88  "^sata-port@[0-9a-f]+$":
89    $ref: /schemas/ata/ahci-common.yaml#/$defs/ahci-port
90
91    anyOf:
92      - required: [ phys ]
93      - required: [ target-supply ]
94
95    unevaluatedProperties: false
96
97required:
98  - compatible
99  - reg
100  - interrupts
101
102allOf:
103  - $ref: ahci-common.yaml#
104
105  - if:
106      properties:
107        compatible:
108          contains:
109            enum:
110              - qcom,apq8064-ahci
111              - qcom,ipq806x-ahci
112    then:
113      properties:
114        clocks:
115          minItems: 5
116        clock-names:
117          items:
118            - const: slave_iface
119            - const: iface
120            - const: core
121            - const: rxoob
122            - const: pmalive
123      required:
124        - phys
125        - phy-names
126        - clocks
127        - clock-names
128
129  - if:
130      properties:
131        compatible:
132          contains:
133            const: socionext,uniphier-pro4-ahci
134    then:
135      properties:
136        resets:
137          items:
138            - description: reset line for the parent
139            - description: reset line for the glue logic
140            - description: reset line for the controller
141      required:
142        - resets
143    else:
144      if:
145        properties:
146          compatible:
147            contains:
148              enum:
149                - socionext,uniphier-pxs2-ahci
150                - socionext,uniphier-pxs3-ahci
151      then:
152        properties:
153          resets:
154            items:
155              - description: reset for the glue logic
156              - description: reset for the controller
157        required:
158          - resets
159      else:
160        properties:
161          resets:
162            maxItems: 1
163
164unevaluatedProperties: false
165
166examples:
167  - |
168    sata@ffe08000 {
169        compatible = "snps,spear-ahci";
170        reg = <0xffe08000 0x1000>;
171        interrupts = <115>;
172    };
173  - |
174    #include <dt-bindings/interrupt-controller/arm-gic.h>
175    #include <dt-bindings/clock/berlin2q.h>
176    #include <dt-bindings/ata/ahci.h>
177
178    sata@f7e90000 {
179        compatible = "marvell,berlin2q-ahci", "generic-ahci";
180        reg = <0xf7e90000 0x1000>;
181        interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
182        clocks = <&chip CLKID_SATA>;
183        #address-cells = <1>;
184        #size-cells = <0>;
185
186        hba-cap = <HBA_SMPS>;
187
188        sata0: sata-port@0 {
189            reg = <0>;
190
191            phys = <&sata_phy 0>;
192            target-supply = <&reg_sata0>;
193
194            hba-port-cap = <(HBA_PORT_FBSCP | HBA_PORT_ESP)>;
195        };
196
197        sata1: sata-port@1 {
198            reg = <1>;
199
200            phys = <&sata_phy 1>;
201            target-supply = <&reg_sata1>;
202
203            hba-port-cap = <(HBA_PORT_HPCP | HBA_PORT_MPSP | HBA_PORT_FBSCP)>;
204        };
205    };
206