xref: /linux/Documentation/devicetree/bindings/ata/ahci-platform.yaml (revision 7f71507851fc7764b36a3221839607d3a45c2025) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/ata/ahci-platform.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: AHCI SATA Controller
8
9description: |
10  SATA nodes are defined to describe on-chip Serial ATA controllers.
11  Each SATA controller should have its own node.
12
13  It is possible, but not required, to represent each port as a sub-node.
14  It allows to enable each port independently when dealing with multiple
15  PHYs.
16
17maintainers:
18  - Hans de Goede <hdegoede@redhat.com>
19  - Jens Axboe <axboe@kernel.dk>
20
21select:
22  properties:
23    compatible:
24      contains:
25        enum:
26          - brcm,iproc-ahci
27          - cavium,octeon-7130-ahci
28          - hisilicon,hisi-ahci
29          - ibm,476gtr-ahci
30          - marvell,armada-3700-ahci
31          - marvell,armada-8k-ahci
32          - marvell,berlin2q-ahci
33          - qcom,apq8064-ahci
34          - qcom,ipq806x-ahci
35          - socionext,uniphier-pro4-ahci
36          - socionext,uniphier-pxs2-ahci
37          - socionext,uniphier-pxs3-ahci
38  required:
39    - compatible
40
41properties:
42  compatible:
43    oneOf:
44      - items:
45          - enum:
46              - brcm,iproc-ahci
47              - marvell,armada-8k-ahci
48              - marvell,berlin2-ahci
49              - marvell,berlin2q-ahci
50              - qcom,apq8064-ahci
51              - qcom,ipq806x-ahci
52              - socionext,uniphier-pro4-ahci
53              - socionext,uniphier-pxs2-ahci
54              - socionext,uniphier-pxs3-ahci
55          - const: generic-ahci
56      - enum:
57          - cavium,octeon-7130-ahci
58          - hisilicon,hisi-ahci
59          - ibm,476gtr-ahci
60          - marvell,armada-3700-ahci
61
62  reg:
63    minItems: 1
64    maxItems: 2
65
66  reg-names:
67    maxItems: 1
68
69  clocks:
70    minItems: 1
71    maxItems: 5
72
73  clock-names:
74    minItems: 1
75    maxItems: 5
76
77  interrupts:
78    maxItems: 1
79
80  power-domains:
81    maxItems: 1
82
83  resets:
84    minItems: 1
85    maxItems: 3
86
87  iommus:
88    maxItems: 1
89
90patternProperties:
91  "^sata-port@[0-9a-f]+$":
92    $ref: /schemas/ata/ahci-common.yaml#/$defs/ahci-port
93
94    anyOf:
95      - required: [ phys ]
96      - required: [ target-supply ]
97
98    unevaluatedProperties: false
99
100required:
101  - compatible
102  - reg
103  - interrupts
104
105allOf:
106  - $ref: ahci-common.yaml#
107
108  - if:
109      properties:
110        compatible:
111          contains:
112            enum:
113              - qcom,apq8064-ahci
114              - qcom,ipq806x-ahci
115    then:
116      properties:
117        clocks:
118          minItems: 5
119        clock-names:
120          items:
121            - const: slave_iface
122            - const: iface
123            - const: core
124            - const: rxoob
125            - const: pmalive
126      required:
127        - phys
128        - phy-names
129        - clocks
130        - clock-names
131
132  - if:
133      properties:
134        compatible:
135          contains:
136            const: socionext,uniphier-pro4-ahci
137    then:
138      properties:
139        resets:
140          items:
141            - description: reset line for the parent
142            - description: reset line for the glue logic
143            - description: reset line for the controller
144      required:
145        - resets
146    else:
147      if:
148        properties:
149          compatible:
150            contains:
151              enum:
152                - socionext,uniphier-pxs2-ahci
153                - socionext,uniphier-pxs3-ahci
154      then:
155        properties:
156          resets:
157            items:
158              - description: reset for the glue logic
159              - description: reset for the controller
160        required:
161          - resets
162      else:
163        properties:
164          resets:
165            maxItems: 1
166
167unevaluatedProperties: false
168
169examples:
170  - |
171    sata@ffe08000 {
172        compatible = "snps,spear-ahci";
173        reg = <0xffe08000 0x1000>;
174        interrupts = <115>;
175    };
176  - |
177    #include <dt-bindings/interrupt-controller/arm-gic.h>
178    #include <dt-bindings/clock/berlin2q.h>
179    #include <dt-bindings/ata/ahci.h>
180
181    sata@f7e90000 {
182        compatible = "marvell,berlin2q-ahci", "generic-ahci";
183        reg = <0xf7e90000 0x1000>;
184        interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
185        clocks = <&chip CLKID_SATA>;
186        #address-cells = <1>;
187        #size-cells = <0>;
188
189        hba-cap = <HBA_SMPS>;
190
191        sata0: sata-port@0 {
192            reg = <0>;
193
194            phys = <&sata_phy 0>;
195            target-supply = <&reg_sata0>;
196
197            hba-port-cap = <(HBA_PORT_FBSCP | HBA_PORT_ESP)>;
198        };
199
200        sata1: sata-port@1 {
201            reg = <1>;
202
203            phys = <&sata_phy 1>;
204            target-supply = <&reg_sata1>;
205
206            hba-port-cap = <(HBA_PORT_HPCP | HBA_PORT_MPSP | HBA_PORT_FBSCP)>;
207        };
208    };
209