1*68ce0053SSumit Gupta# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*68ce0053SSumit Gupta%YAML 1.2 3*68ce0053SSumit Gupta--- 4*68ce0053SSumit Gupta$id: "http://devicetree.org/schemas/arm/tegra/nvidia,tegra234-cbb.yaml#" 5*68ce0053SSumit Gupta$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6*68ce0053SSumit Gupta 7*68ce0053SSumit Guptatitle: NVIDIA Tegra CBB 2.0 bindings 8*68ce0053SSumit Gupta 9*68ce0053SSumit Guptamaintainers: 10*68ce0053SSumit Gupta - Sumit Gupta <sumitg@nvidia.com> 11*68ce0053SSumit Gupta 12*68ce0053SSumit Guptadescription: |+ 13*68ce0053SSumit Gupta The Control Backbone (CBB) is comprised of the physical path from an 14*68ce0053SSumit Gupta initiator to a target's register configuration space. CBB 2.0 consists 15*68ce0053SSumit Gupta of multiple sub-blocks connected to each other to create a topology. 16*68ce0053SSumit Gupta The Tegra234 SoC has different fabrics based on CBB 2.0 architecture 17*68ce0053SSumit Gupta which include cluster fabrics BPMP, AON, PSC, SCE, RCE, DCE, FSI and 18*68ce0053SSumit Gupta "CBB central fabric". 19*68ce0053SSumit Gupta 20*68ce0053SSumit Gupta In CBB 2.0, each initiator which can issue transactions connects to a 21*68ce0053SSumit Gupta Root Master Node (MN) before it connects to any other element of the 22*68ce0053SSumit Gupta fabric. Each Root MN contains a Error Monitor (EM) which detects and 23*68ce0053SSumit Gupta logs error. Interrupts from various EM blocks are collated by Error 24*68ce0053SSumit Gupta Notifier (EN) which is per fabric and presents a single interrupt from 25*68ce0053SSumit Gupta fabric to the SoC interrupt controller. 26*68ce0053SSumit Gupta 27*68ce0053SSumit Gupta The driver handles errors from CBB due to illegal register accesses 28*68ce0053SSumit Gupta and prints debug information about failed transaction on receiving 29*68ce0053SSumit Gupta the interrupt from EN. Debug information includes Error Code, Error 30*68ce0053SSumit Gupta Description, MasterID, Fabric, SlaveID, Address, Cache, Protection, 31*68ce0053SSumit Gupta Security Group etc on receiving error notification. 32*68ce0053SSumit Gupta 33*68ce0053SSumit Gupta If the Error Response Disable (ERD) is set/enabled for an initiator, 34*68ce0053SSumit Gupta then SError or Data abort exception error response is masked and an 35*68ce0053SSumit Gupta interrupt is used for reporting errors due to illegal accesses from 36*68ce0053SSumit Gupta that initiator. The value returned on read failures is '0xFFFFFFFF' 37*68ce0053SSumit Gupta for compatibility with PCIE. 38*68ce0053SSumit Gupta 39*68ce0053SSumit Guptaproperties: 40*68ce0053SSumit Gupta $nodename: 41*68ce0053SSumit Gupta pattern: "^[a-z]+-fabric@[0-9a-f]+$" 42*68ce0053SSumit Gupta 43*68ce0053SSumit Gupta compatible: 44*68ce0053SSumit Gupta enum: 45*68ce0053SSumit Gupta - nvidia,tegra234-aon-fabric 46*68ce0053SSumit Gupta - nvidia,tegra234-bpmp-fabric 47*68ce0053SSumit Gupta - nvidia,tegra234-cbb-fabric 48*68ce0053SSumit Gupta - nvidia,tegra234-dce-fabric 49*68ce0053SSumit Gupta - nvidia,tegra234-rce-fabric 50*68ce0053SSumit Gupta - nvidia,tegra234-sce-fabric 51*68ce0053SSumit Gupta 52*68ce0053SSumit Gupta reg: 53*68ce0053SSumit Gupta maxItems: 1 54*68ce0053SSumit Gupta 55*68ce0053SSumit Gupta interrupts: 56*68ce0053SSumit Gupta items: 57*68ce0053SSumit Gupta - description: secure interrupt from error notifier 58*68ce0053SSumit Gupta 59*68ce0053SSumit GuptaadditionalProperties: false 60*68ce0053SSumit Gupta 61*68ce0053SSumit Guptarequired: 62*68ce0053SSumit Gupta - compatible 63*68ce0053SSumit Gupta - reg 64*68ce0053SSumit Gupta - interrupts 65*68ce0053SSumit Gupta 66*68ce0053SSumit Guptaexamples: 67*68ce0053SSumit Gupta - | 68*68ce0053SSumit Gupta #include <dt-bindings/interrupt-controller/arm-gic.h> 69*68ce0053SSumit Gupta 70*68ce0053SSumit Gupta cbb-fabric@1300000 { 71*68ce0053SSumit Gupta compatible = "nvidia,tegra234-cbb-fabric"; 72*68ce0053SSumit Gupta reg = <0x13a00000 0x400000>; 73*68ce0053SSumit Gupta interrupts = <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>; 74*68ce0053SSumit Gupta }; 75