168ce0053SSumit Gupta# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 268ce0053SSumit Gupta%YAML 1.2 368ce0053SSumit Gupta--- 4*c94673e8SRob Herring$id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra234-cbb.yaml# 5*c94673e8SRob Herring$schema: http://devicetree.org/meta-schemas/core.yaml# 668ce0053SSumit Gupta 784e85359SKrzysztof Kozlowskititle: NVIDIA Tegra CBB 2.0 868ce0053SSumit Gupta 968ce0053SSumit Guptamaintainers: 1068ce0053SSumit Gupta - Sumit Gupta <sumitg@nvidia.com> 1168ce0053SSumit Gupta 1268ce0053SSumit Guptadescription: |+ 1368ce0053SSumit Gupta The Control Backbone (CBB) is comprised of the physical path from an 1468ce0053SSumit Gupta initiator to a target's register configuration space. CBB 2.0 consists 1568ce0053SSumit Gupta of multiple sub-blocks connected to each other to create a topology. 1668ce0053SSumit Gupta The Tegra234 SoC has different fabrics based on CBB 2.0 architecture 1768ce0053SSumit Gupta which include cluster fabrics BPMP, AON, PSC, SCE, RCE, DCE, FSI and 1868ce0053SSumit Gupta "CBB central fabric". 1968ce0053SSumit Gupta 2068ce0053SSumit Gupta In CBB 2.0, each initiator which can issue transactions connects to a 2168ce0053SSumit Gupta Root Master Node (MN) before it connects to any other element of the 2268ce0053SSumit Gupta fabric. Each Root MN contains a Error Monitor (EM) which detects and 2368ce0053SSumit Gupta logs error. Interrupts from various EM blocks are collated by Error 2468ce0053SSumit Gupta Notifier (EN) which is per fabric and presents a single interrupt from 2568ce0053SSumit Gupta fabric to the SoC interrupt controller. 2668ce0053SSumit Gupta 2768ce0053SSumit Gupta The driver handles errors from CBB due to illegal register accesses 2868ce0053SSumit Gupta and prints debug information about failed transaction on receiving 2968ce0053SSumit Gupta the interrupt from EN. Debug information includes Error Code, Error 3068ce0053SSumit Gupta Description, MasterID, Fabric, SlaveID, Address, Cache, Protection, 3168ce0053SSumit Gupta Security Group etc on receiving error notification. 3268ce0053SSumit Gupta 3368ce0053SSumit Gupta If the Error Response Disable (ERD) is set/enabled for an initiator, 3468ce0053SSumit Gupta then SError or Data abort exception error response is masked and an 3568ce0053SSumit Gupta interrupt is used for reporting errors due to illegal accesses from 3668ce0053SSumit Gupta that initiator. The value returned on read failures is '0xFFFFFFFF' 3768ce0053SSumit Gupta for compatibility with PCIE. 3868ce0053SSumit Gupta 3968ce0053SSumit Guptaproperties: 4068ce0053SSumit Gupta $nodename: 4168ce0053SSumit Gupta pattern: "^[a-z]+-fabric@[0-9a-f]+$" 4268ce0053SSumit Gupta 4368ce0053SSumit Gupta compatible: 4468ce0053SSumit Gupta enum: 4568ce0053SSumit Gupta - nvidia,tegra234-aon-fabric 4668ce0053SSumit Gupta - nvidia,tegra234-bpmp-fabric 4768ce0053SSumit Gupta - nvidia,tegra234-cbb-fabric 4868ce0053SSumit Gupta - nvidia,tegra234-dce-fabric 4968ce0053SSumit Gupta - nvidia,tegra234-rce-fabric 5068ce0053SSumit Gupta - nvidia,tegra234-sce-fabric 5168ce0053SSumit Gupta 5268ce0053SSumit Gupta reg: 5368ce0053SSumit Gupta maxItems: 1 5468ce0053SSumit Gupta 5568ce0053SSumit Gupta interrupts: 5668ce0053SSumit Gupta items: 5768ce0053SSumit Gupta - description: secure interrupt from error notifier 5868ce0053SSumit Gupta 5968ce0053SSumit GuptaadditionalProperties: false 6068ce0053SSumit Gupta 6168ce0053SSumit Guptarequired: 6268ce0053SSumit Gupta - compatible 6368ce0053SSumit Gupta - reg 6468ce0053SSumit Gupta - interrupts 6568ce0053SSumit Gupta 6668ce0053SSumit Guptaexamples: 6768ce0053SSumit Gupta - | 6868ce0053SSumit Gupta #include <dt-bindings/interrupt-controller/arm-gic.h> 6968ce0053SSumit Gupta 7068ce0053SSumit Gupta cbb-fabric@1300000 { 7168ce0053SSumit Gupta compatible = "nvidia,tegra234-cbb-fabric"; 7268ce0053SSumit Gupta reg = <0x13a00000 0x400000>; 7368ce0053SSumit Gupta interrupts = <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>; 7468ce0053SSumit Gupta }; 75