1*2b3625a8SYuanfang Zhang# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2*2b3625a8SYuanfang Zhang%YAML 1.2 3*2b3625a8SYuanfang Zhang--- 4*2b3625a8SYuanfang Zhang$id: http://devicetree.org/schemas/arm/qcom,coresight-itnoc.yaml# 5*2b3625a8SYuanfang Zhang$schema: http://devicetree.org/meta-schemas/core.yaml# 6*2b3625a8SYuanfang Zhang 7*2b3625a8SYuanfang Zhangtitle: Qualcomm Interconnect Trace Network On Chip - ITNOC 8*2b3625a8SYuanfang Zhang 9*2b3625a8SYuanfang Zhangmaintainers: 10*2b3625a8SYuanfang Zhang - Yuanfang Zhang <yuanfang.zhang@oss.qualcomm.com> 11*2b3625a8SYuanfang Zhang 12*2b3625a8SYuanfang Zhangdescription: 13*2b3625a8SYuanfang Zhang The Interconnect TNOC is a CoreSight graph link that forwards trace data 14*2b3625a8SYuanfang Zhang from a subsystem to the Aggregator TNOC. Compared to Aggregator TNOC, it 15*2b3625a8SYuanfang Zhang does not have aggregation and ATID functionality. 16*2b3625a8SYuanfang Zhang 17*2b3625a8SYuanfang Zhangproperties: 18*2b3625a8SYuanfang Zhang $nodename: 19*2b3625a8SYuanfang Zhang pattern: "^itnoc(@[0-9a-f]+)?$" 20*2b3625a8SYuanfang Zhang 21*2b3625a8SYuanfang Zhang compatible: 22*2b3625a8SYuanfang Zhang const: qcom,coresight-itnoc 23*2b3625a8SYuanfang Zhang 24*2b3625a8SYuanfang Zhang reg: 25*2b3625a8SYuanfang Zhang maxItems: 1 26*2b3625a8SYuanfang Zhang 27*2b3625a8SYuanfang Zhang clocks: 28*2b3625a8SYuanfang Zhang maxItems: 1 29*2b3625a8SYuanfang Zhang 30*2b3625a8SYuanfang Zhang clock-names: 31*2b3625a8SYuanfang Zhang items: 32*2b3625a8SYuanfang Zhang - const: apb 33*2b3625a8SYuanfang Zhang 34*2b3625a8SYuanfang Zhang in-ports: 35*2b3625a8SYuanfang Zhang $ref: /schemas/graph.yaml#/properties/ports 36*2b3625a8SYuanfang Zhang 37*2b3625a8SYuanfang Zhang patternProperties: 38*2b3625a8SYuanfang Zhang '^port(@[0-9a-f]{1,2})?$': 39*2b3625a8SYuanfang Zhang description: Input connections from CoreSight Trace Bus 40*2b3625a8SYuanfang Zhang $ref: /schemas/graph.yaml#/properties/port 41*2b3625a8SYuanfang Zhang 42*2b3625a8SYuanfang Zhang out-ports: 43*2b3625a8SYuanfang Zhang $ref: /schemas/graph.yaml#/properties/ports 44*2b3625a8SYuanfang Zhang additionalProperties: false 45*2b3625a8SYuanfang Zhang 46*2b3625a8SYuanfang Zhang properties: 47*2b3625a8SYuanfang Zhang port: 48*2b3625a8SYuanfang Zhang description: out connections to aggregator TNOC 49*2b3625a8SYuanfang Zhang $ref: /schemas/graph.yaml#/properties/port 50*2b3625a8SYuanfang Zhang 51*2b3625a8SYuanfang Zhangrequired: 52*2b3625a8SYuanfang Zhang - compatible 53*2b3625a8SYuanfang Zhang - reg 54*2b3625a8SYuanfang Zhang - clocks 55*2b3625a8SYuanfang Zhang - clock-names 56*2b3625a8SYuanfang Zhang - in-ports 57*2b3625a8SYuanfang Zhang - out-ports 58*2b3625a8SYuanfang Zhang 59*2b3625a8SYuanfang ZhangadditionalProperties: false 60*2b3625a8SYuanfang Zhang 61*2b3625a8SYuanfang Zhangexamples: 62*2b3625a8SYuanfang Zhang - | 63*2b3625a8SYuanfang Zhang itnoc@109ac000 { 64*2b3625a8SYuanfang Zhang compatible = "qcom,coresight-itnoc"; 65*2b3625a8SYuanfang Zhang reg = <0x109ac000 0x1000>; 66*2b3625a8SYuanfang Zhang 67*2b3625a8SYuanfang Zhang clocks = <&aoss_qmp>; 68*2b3625a8SYuanfang Zhang clock-names = "apb"; 69*2b3625a8SYuanfang Zhang 70*2b3625a8SYuanfang Zhang in-ports { 71*2b3625a8SYuanfang Zhang #address-cells = <1>; 72*2b3625a8SYuanfang Zhang #size-cells = <0>; 73*2b3625a8SYuanfang Zhang port@0 { 74*2b3625a8SYuanfang Zhang reg = <0>; 75*2b3625a8SYuanfang Zhang tn_ic_in_tpdm_dcc: endpoint { 76*2b3625a8SYuanfang Zhang remote-endpoint = <&tpdm_dcc_out_tn_ic>; 77*2b3625a8SYuanfang Zhang }; 78*2b3625a8SYuanfang Zhang }; 79*2b3625a8SYuanfang Zhang }; 80*2b3625a8SYuanfang Zhang 81*2b3625a8SYuanfang Zhang out-ports { 82*2b3625a8SYuanfang Zhang port { 83*2b3625a8SYuanfang Zhang tn_ic_out_tnoc_aggr: endpoint { 84*2b3625a8SYuanfang Zhang /* to Aggregator TNOC input */ 85*2b3625a8SYuanfang Zhang remote-endpoint = <&tn_ag_in_tn_ic>; 86*2b3625a8SYuanfang Zhang }; 87*2b3625a8SYuanfang Zhang }; 88*2b3625a8SYuanfang Zhang }; 89*2b3625a8SYuanfang Zhang }; 90*2b3625a8SYuanfang Zhang... 91