1476b679aSBenoit Cousson* TI - MPU (Main Processor Unit) subsystem 2476b679aSBenoit Cousson 3476b679aSBenoit CoussonThe MPU subsystem contain one or several ARM cores 4476b679aSBenoit Coussondepending of the version. 5476b679aSBenoit CoussonThe MPU contain CPUs, GIC, L2 cache and a local PRCM. 6476b679aSBenoit Cousson 7476b679aSBenoit CoussonRequired properties: 8476b679aSBenoit Cousson- compatible : Should be "ti,omap3-mpu" for OMAP3 9476b679aSBenoit Cousson Should be "ti,omap4-mpu" for OMAP4 10*f1e8e381SSricharan R Should be "ti,omap5-mpu" for OMAP5 11476b679aSBenoit Cousson- ti,hwmods: "mpu" 12476b679aSBenoit Cousson 13476b679aSBenoit CoussonExamples: 14476b679aSBenoit Cousson 15*f1e8e381SSricharan R- For an OMAP5 SMP system: 16*f1e8e381SSricharan R 17*f1e8e381SSricharan Rmpu { 18*f1e8e381SSricharan R compatible = "ti,omap5-mpu"; 19*f1e8e381SSricharan R ti,hwmods = "mpu" 20*f1e8e381SSricharan R}; 21*f1e8e381SSricharan R 22476b679aSBenoit Cousson- For an OMAP4 SMP system: 23476b679aSBenoit Cousson 24476b679aSBenoit Coussonmpu { 25476b679aSBenoit Cousson compatible = "ti,omap4-mpu"; 26476b679aSBenoit Cousson ti,hwmods = "mpu"; 27476b679aSBenoit Cousson}; 28476b679aSBenoit Cousson 29476b679aSBenoit Cousson 30476b679aSBenoit Cousson- For an OMAP3 monocore system: 31476b679aSBenoit Cousson 32476b679aSBenoit Coussonmpu { 33476b679aSBenoit Cousson compatible = "ti,omap3-mpu"; 34476b679aSBenoit Cousson ti,hwmods = "mpu"; 35476b679aSBenoit Cousson}; 36