xref: /linux/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml (revision dec1c62e91ba268ab2a6e339d4d7a59287d5eba1) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mmsys.yaml#"
5$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6
7title: MediaTek mmsys controller
8
9maintainers:
10  - Matthias Brugger <matthias.bgg@gmail.com>
11
12description:
13  The MediaTek mmsys system controller provides clock control, routing control,
14  and miscellaneous control in mmsys partition.
15
16properties:
17  $nodename:
18    pattern: "^syscon@[0-9a-f]+$"
19
20  compatible:
21    oneOf:
22      - items:
23          - enum:
24              - mediatek,mt2701-mmsys
25              - mediatek,mt2712-mmsys
26              - mediatek,mt6765-mmsys
27              - mediatek,mt6779-mmsys
28              - mediatek,mt6797-mmsys
29              - mediatek,mt8167-mmsys
30              - mediatek,mt8173-mmsys
31              - mediatek,mt8183-mmsys
32              - mediatek,mt8186-mmsys
33              - mediatek,mt8192-mmsys
34              - mediatek,mt8195-mmsys
35              - mediatek,mt8365-mmsys
36          - const: syscon
37      - items:
38          - const: mediatek,mt7623-mmsys
39          - const: mediatek,mt2701-mmsys
40          - const: syscon
41
42  reg:
43    maxItems: 1
44
45  power-domains:
46    description:
47      A phandle and PM domain specifier as defined by bindings
48      of the power controller specified by phandle. See
49      Documentation/devicetree/bindings/power/power-domain.yaml for details.
50
51  mboxes:
52    description:
53      Using mailbox to communicate with GCE, it should have this
54      property and list of phandle, mailbox specifiers. See
55      Documentation/devicetree/bindings/mailbox/mtk-gce.txt for details.
56    $ref: /schemas/types.yaml#/definitions/phandle-array
57
58  mediatek,gce-client-reg:
59    description:
60      The register of client driver can be configured by gce with 4 arguments
61      defined in this property, such as phandle of gce, subsys id,
62      register offset and size.
63      Each subsys id is mapping to a base address of display function blocks
64      register which is defined in the gce header
65      include/dt-bindings/gce/<chip>-gce.h.
66    $ref: /schemas/types.yaml#/definitions/phandle-array
67    maxItems: 1
68
69  "#clock-cells":
70    const: 1
71
72  '#reset-cells':
73    const: 1
74
75required:
76  - compatible
77  - reg
78  - "#clock-cells"
79
80additionalProperties: false
81
82examples:
83  - |
84    #include <dt-bindings/power/mt8173-power.h>
85    #include <dt-bindings/gce/mt8173-gce.h>
86
87    mmsys: syscon@14000000 {
88        compatible = "mediatek,mt8173-mmsys", "syscon";
89        reg = <0x14000000 0x1000>;
90        power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
91        #clock-cells = <1>;
92        #reset-cells = <1>;
93        mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
94                 <&gce 1 CMDQ_THR_PRIO_HIGHEST>;
95        mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
96    };
97