1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt7622-wed.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: MediaTek Wireless Ethernet Dispatch Controller for MT7622 8 9maintainers: 10 - Lorenzo Bianconi <lorenzo@kernel.org> 11 - Felix Fietkau <nbd@nbd.name> 12 13description: 14 The mediatek wireless ethernet dispatch controller can be configured to 15 intercept and handle access to the WLAN DMA queues and PCIe interrupts 16 and implement hardware flow offloading from ethernet to WLAN. 17 18properties: 19 compatible: 20 items: 21 - enum: 22 - mediatek,mt7622-wed 23 - mediatek,mt7981-wed 24 - mediatek,mt7986-wed 25 - const: syscon 26 27 reg: 28 maxItems: 1 29 30 interrupts: 31 maxItems: 1 32 33 memory-region: 34 items: 35 - description: firmware EMI region 36 - description: firmware ILM region 37 - description: firmware DLM region 38 - description: firmware CPU DATA region 39 - description: firmware BOOT region 40 41 memory-region-names: 42 items: 43 - const: wo-emi 44 - const: wo-ilm 45 - const: wo-dlm 46 - const: wo-data 47 - const: wo-boot 48 49 mediatek,wo-ccif: 50 $ref: /schemas/types.yaml#/definitions/phandle 51 description: mediatek wed-wo controller interface. 52 53allOf: 54 - if: 55 properties: 56 compatible: 57 contains: 58 const: mediatek,mt7622-wed 59 then: 60 properties: 61 memory-region-names: false 62 memory-region: false 63 mediatek,wo-ccif: false 64 65required: 66 - compatible 67 - reg 68 - interrupts 69 70additionalProperties: false 71 72examples: 73 - | 74 #include <dt-bindings/interrupt-controller/arm-gic.h> 75 #include <dt-bindings/interrupt-controller/irq.h> 76 soc { 77 #address-cells = <2>; 78 #size-cells = <2>; 79 wed0: wed@1020a000 { 80 compatible = "mediatek,mt7622-wed","syscon"; 81 reg = <0 0x1020a000 0 0x1000>; 82 interrupts = <GIC_SPI 214 IRQ_TYPE_LEVEL_LOW>; 83 }; 84 }; 85 86 - | 87 #include <dt-bindings/interrupt-controller/arm-gic.h> 88 #include <dt-bindings/interrupt-controller/irq.h> 89 soc { 90 #address-cells = <2>; 91 #size-cells = <2>; 92 93 wed@15010000 { 94 compatible = "mediatek,mt7986-wed", "syscon"; 95 reg = <0 0x15010000 0 0x1000>; 96 interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>; 97 98 memory-region = <&wo_emi>, <&wo_ilm>, <&wo_dlm>, 99 <&wo_data>, <&wo_boot>; 100 memory-region-names = "wo-emi", "wo-ilm", "wo-dlm", 101 "wo-data", "wo-boot"; 102 mediatek,wo-ccif = <&wo_ccif0>; 103 }; 104 }; 105