xref: /linux/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml (revision 7340c6df49df1b261892d287444c255d0a378063) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/arm/hisilicon/controller/cpuctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Hisilicon CPU controller
8
9maintainers:
10  - Wei Xu <xuwei5@hisilicon.com>
11
12description: |
13  The clock registers and power registers of secondary cores are defined
14  in CPU controller, especially in HIX5HD2 SoC.
15
16properties:
17  compatible:
18    items:
19      - const: hisilicon,cpuctrl
20
21  reg:
22    maxItems: 1
23
24  "#address-cells":
25    const: 1
26
27  "#size-cells":
28    const: 1
29
30  ranges: true
31
32patternProperties:
33  "^clock@[0-9a-f]+$":
34    type: object
35    additionalProperties: false
36
37    properties:
38      compatible:
39        const: hisilicon,hix5hd2-clock
40
41      reg:
42        maxItems: 1
43
44      "#clock-cells":
45        const: 1
46
47    required:
48      - compatible
49      - reg
50      - "#clock-cells"
51
52required:
53  - compatible
54  - reg
55
56additionalProperties:
57  type: object
58
59examples:
60  - |
61    cpuctrl@a22000 {
62        compatible = "hisilicon,cpuctrl";
63        #address-cells = <1>;
64        #size-cells = <1>;
65        reg = <0x00a22000 0x2000>;
66        ranges = <0 0x00a22000 0x2000>;
67
68        clock: clock@0 {
69            compatible = "hisilicon,hix5hd2-clock";
70            reg = <0 0x2000>;
71            #clock-cells = <1>;
72        };
73    };
74...
75