xref: /linux/Documentation/devicetree/bindings/arm/cpu-enable-method/al,alpine-smp (revision 2a6b6c9a226279b4f6668450ddb21ae655558087) 
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2Secondary CPU enable-method "al,alpine-smp" binding
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4
5This document describes the "al,alpine-smp" method for
6enabling secondary CPUs. To apply to all CPUs, a single
7"al,alpine-smp" enable method should be defined in the
8"cpus" node.
9
10Enable method name:	"al,alpine-smp"
11Compatible machines:	"al,alpine"
12Compatible CPUs:	"arm,cortex-a15"
13Related properties:	(none)
14
15Note:
16This enable method requires valid nodes compatible with
17"al,alpine-cpu-resume" and "al,alpine-nb-service".
18
19
20* Alpine CPU resume registers
21
22The CPU resume register are used to define required resume address after
23reset.
24
25Properties:
26- compatible : Should contain "al,alpine-cpu-resume".
27- reg : Offset and length of the register set for the device
28
29
30Example:
31
32cpus {
33	#address-cells = <1>;
34	#size-cells = <0>;
35	enable-method = "al,alpine-smp";
36
37	cpu@0 {
38		compatible = "arm,cortex-a15";
39		device_type = "cpu";
40		reg = <0>;
41	};
42
43	cpu@1 {
44		compatible = "arm,cortex-a15";
45		device_type = "cpu";
46		reg = <1>;
47	};
48
49	cpu@2 {
50		compatible = "arm,cortex-a15";
51		device_type = "cpu";
52		reg = <2>;
53	};
54
55	cpu@3 {
56		compatible = "arm,cortex-a15";
57		device_type = "cpu";
58		reg = <3>;
59	};
60};
61
62cpu_resume {
63	compatible = "al,alpine-cpu-resume";
64	reg = <0xfbff5ed0 0x30>;
65};
66
67nb_service {
68        compatible = "al,alpine-sysfabric-service", "syscon";
69        reg = <0xfb070000 0x10000>;
70};
71