xref: /linux/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt (revision ca55b2fef3a9373fcfc30f82fd26bc7fccbda732) 
1ARM Broadcom STB platforms Device Tree Bindings
2-----------------------------------------------
3Boards with Broadcom Brahma15 ARM-based BCMxxxx (generally BCM7xxx variants)
4SoC shall have the following DT organization:
5
6Required root node properties:
7    - compatible: "brcm,bcm<chip_id>", "brcm,brcmstb"
8
9example:
10/ {
11    #address-cells = <2>;
12    #size-cells = <2>;
13    model = "Broadcom STB (bcm7445)";
14    compatible = "brcm,bcm7445", "brcm,brcmstb";
15
16Further, syscon nodes that map platform-specific registers used for general
17system control is required:
18
19    - compatible: "brcm,bcm<chip_id>-sun-top-ctrl", "syscon"
20    - compatible: "brcm,bcm<chip_id>-hif-cpubiuctrl", "syscon"
21    - compatible: "brcm,bcm<chip_id>-hif-continuation", "syscon"
22
23example:
24    rdb {
25        #address-cells = <1>;
26        #size-cells = <1>;
27        compatible = "simple-bus";
28        ranges = <0 0x00 0xf0000000 0x1000000>;
29
30        sun_top_ctrl: syscon@404000 {
31            compatible = "brcm,bcm7445-sun-top-ctrl", "syscon";
32            reg = <0x404000 0x51c>;
33        };
34
35        hif_cpubiuctrl: syscon@3e2400 {
36            compatible = "brcm,bcm7445-hif-cpubiuctrl", "syscon";
37            reg = <0x3e2400 0x5b4>;
38        };
39
40        hif_continuation: syscon@452000 {
41            compatible = "brcm,bcm7445-hif-continuation", "syscon";
42            reg = <0x452000 0x100>;
43        };
44    };
45
46Lastly, nodes that allow for support of SMP initialization and reboot are
47required:
48
49smpboot
50-------
51Required properties:
52
53    - compatible
54        The string "brcm,brcmstb-smpboot".
55
56    - syscon-cpu
57        A phandle / integer array property which lets the BSP know the location
58        of certain CPU power-on registers.
59
60        The layout of the property is as follows:
61            o a phandle to the "hif_cpubiuctrl" syscon node
62            o offset to the base CPU power zone register
63            o offset to the base CPU reset register
64
65    - syscon-cont
66        A phandle pointing to the syscon node which describes the CPU boot
67        continuation registers.
68            o a phandle to the "hif_continuation" syscon node
69
70example:
71    smpboot {
72        compatible = "brcm,brcmstb-smpboot";
73        syscon-cpu = <&hif_cpubiuctrl 0x88 0x178>;
74        syscon-cont = <&hif_continuation>;
75    };
76
77reboot
78-------
79Required properties
80
81    - compatible
82        The string property "brcm,brcmstb-reboot" for 40nm/28nm chips with
83        the new SYS_CTRL interface, or "brcm,bcm7038-reboot" for 65nm
84        chips with the old SUN_TOP_CTRL interface.
85
86    - syscon
87        A phandle / integer array that points to the syscon node which describes
88        the general system reset registers.
89            o a phandle to "sun_top_ctrl"
90            o offset to the "reset source enable" register
91            o offset to the "software master reset" register
92
93example:
94    reboot {
95        compatible = "brcm,brcmstb-reboot";
96        syscon = <&sun_top_ctrl 0x304 0x308>;
97    };
98