xref: /linux/Documentation/devicetree/bindings/arm/bcm/brcm,bcm63138.txt (revision df10846ff2ac3b0a7b295be2de2e9215877982f3) 
1Broadcom BCM63138 DSL System-on-a-Chip device tree bindings
2-----------------------------------------------------------
3
4Boards compatible with the BCM63138 DSL System-on-a-Chip should have the
5following properties:
6
7Required root node property:
8
9compatible: should be "brcm,bcm63138"
10
11An optional Boot lookup table Device Tree node is required for secondary CPU
12initialization as well as a 'resets' phandle to the correct PMB controller as
13defined in reset/brcm,bcm63138-pmb.txt for this secondary CPU, and an
14'enable-method' property.
15
16Required properties for the Boot lookup table node:
17- compatible: should be "brcm,bcm63138-bootlut"
18- reg: register base address and length for the Boot Lookup table
19
20Optional properties for the primary CPU node:
21- enable-method: should be "brcm,bcm63138"
22
23Optional properties for the secondary CPU node:
24- enable-method: should be "brcm,bcm63138"
25- resets: phandle to the relevant PMB controller, one integer indicating the internal
26  bus number, and a second integer indicating the address of the CPU in the PMB
27  internal bus number.
28
29Example:
30
31	cpus {
32		cpu@0 {
33			compatible = "arm,cotex-a9";
34			reg = <0>;
35			...
36			enable-method = "brcm,bcm63138";
37		};
38
39		cpu@1 {
40			compatible = "arm,cortex-a9";
41			reg = <1>;
42			...
43			enable-method = "brcm,bcm63138";
44			resets = <&pmb0 4 1>;
45		};
46	};
47
48	bootlut: bootlut@8000 {
49		compatible = "brcm,bcm63138-bootlut";
50		reg = <0x8000 0x50>;
51	};
52
53=======
54reboot
55------
56Two nodes are required for software reboot: a timer node and a syscon-reboot node.
57
58Timer node:
59
60- compatible: Must be "brcm,bcm6328-timer", "syscon"
61- reg: Register base address and length
62
63Syscon reboot node:
64
65See Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml for the
66detailed list of properties, the two values defined below are specific to the
67BCM6328-style timer:
68
69- offset: Should be 0x34 to denote the offset of the TIMER_WD_TIMER_RESET register
70  from the beginning of the TIMER block
71- mask: Should be 1 for the SoftRst bit.
72
73Example:
74
75	timer: timer@80 {
76		compatible = "brcm,bcm6328-timer", "syscon";
77		reg = <0x80 0x3c>;
78	};
79
80	reboot {
81		compatible = "syscon-reboot";
82		regmap = <&timer>;
83		offset = <0x34>;
84		mask = <0x1>;
85	};
86